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ATPL00B Datasheet(PDF) 26 Page - ATMEL Corporation |
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ATPL00B Datasheet(HTML) 26 Page - ATMEL Corporation |
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26 / 152 page ![]() Atmel ATPL00B [datasheet] 43028A-ATPL - 9/12 26 In the Lower 128 bytes of IDATA, the lowest 32 bytes are grouped into 4 banks of 8 registers. Program instructions call out these registers as R0 through R7. Two bits in the Program Status Word (PSW) select which register bank is in use. This allows more efficient use of code space, since register instructions are shorter than instructions that use direct addressing. The next 16 bytes above the register banks form a block of bit-addressable memory space. The 80C51 instruction set includes a wide selection of single-bit instructions, and the 128 bits in this area can be directly addressed by these instructions. The bit addresses in this area are 00H through 7FH. Summarizing, the Lower 128 bytes are accessed independently of the addressing mode (direct or indirect addressing). The Upper 128 bytes can be accessed only by indirect addressing, whereas SRF space is accessed only by direct addressing. Table 4-2 gives a look at the Special Function Register (SFR) space. SFRs include the Port registers, timers, peripheral controls, etc. These registers can only be accessed by direct addressing. Sixteen addresses in SFR space are both byte and bit addressable. The bit addressable SFRs are those whose address ends in 0H or 8H. ADD8051C3A includes the same 21 SFRs included in the legacy 8051C plus additional SFRs to implement the extended features. The CPU generates the RD (P3.7) and WR (P3.6) signals needed during SRAM accesses, as shown below. 4.3.4 SFR Registers Table 4-2 shows a map of the internal memory area called the Special Function Register (SFR) space. The entries in bold are registers not included in the standard architecture of the 8051, these entries are specific for the ADD8051C3A. Blank entries are not implemented on the chip. User software should not write to these unimplemented locations. Read accesses to these addresses will return random data Table 4-2. Special Function Registers (specific ADD8051C3A registers in bold) @(Hex) @(Hex) F8 T3 FF F0 B CONF F7 E8 EF E0 ACC SPSTAT SPCTL SPDAT SPSTAT1 SPCTL1 E7 D8 SPDAT10 SPDAT11 SPDAT12 SPDAT13 SPDAT14 SPDAT15 SPDAT16 SPDAT17 DF D0 PSW D7 C8 T2CON T2MOD RCAP2L RCAP2H TL2 TH2 CF C0 P4 P5 C7 B8 IP BF B0 P3 IPH B7 A8 IE AF A0 P2 IE2 AUX1 AUX2 A7 98 SCON SBUF SCON1 SBUF1 P3M P4M P5M 9F 90 P1 IP2HL SCON2 SBUF2 T1NP 97 88 TCON TMOD TL0 TL1 TH0 TH1 TPR T1NC 8F 80 P0 SP DPL DPH PCON 87 |
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