ATPL00B datasheet(31/152 Pages) ATMEL

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Atmel ATPL00B [datasheet]

43028A-ATPL - 9/12

Table 4-3.

Arithmetic Instructions

MNEMONIC

OPERATION

ADDRESSING MODES

EXECUTION

DIR

IND

REG

IMM

TIMES (mc)

ADD A,<byte>

A = A + <byte>

ADD A,<byte>

A = A + <byte> + C

SUBB A,<byte>

A = A

– <byte> – C

INC A

A = A + 1

Accumulator only

INC<byte>

<byte> = <byte> + 1

INC DPTR

DPTR = DPTR + 1

Data Pointer only

DEC A

A = A

– 1

Accumulator only

DEC<byte>

– 1

MUL AB

B*A = B x A

ACC and B only

DIV AB

A = Int[A/B]

ACC and B only

B = Mod[A/B]

DA A

Decimal Adjust

Accumulator only

4.4.4

Logical Instructions

Table 4-4 shows the list of logical instructions. The instructions that perform Boolean operations (AND, OR, Exclusive

OR, CPL) on bytes perform the operation on a bit-by-bit basis. That is, if the Accumulator contains 00110101B and byte

contains 01010011B, then:

ANL A, <byte>

will leave the Accumulator holding 00010001B.

The addressing modes that can be used to access the <byte> operand are listed in Table 4-4.

The ANL A, <byte> instruction may take any of the forms:

ANL

A,6FH

(direct addressing)

ANL

A,@R0

(indirect addressing)

ANL

A,R5

(register addressing)

ANL

A,#42H

(immediate constant)

All of the logical instructions execute in 1mc (0.3us using a 10MHz clock).

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