ATPL00B datasheet(27/152 Pages) ATMEL

27 / 152 page

Atmel ATPL00B [datasheet]

43028A-ATPL - 9/12

The functions of some SFRs are described in the text below, while others are described with their related peripherals.



Accumulator (address: E0H)

ACC is the Accumulator register. Note that mnemonics for accumulator specific instructions usually

refer to the Accumulator simply as A.



B Register (address: F0H)

The B register is used during multiply and divide operations. For other instructions it can be treated

as another scratch pad register.



PSW register (address: D0H)

The PSW register contains program status information as detailed below.

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

B it 0

PSW

RS1

RS0



CY: Carry flag



AC: Auxiliary carry flag



F0: General purpose flag



RS(1:0): Register bank select control bits



OV: Overflow flag



F1: User definable flag



P: Parity flag



Stack Pointer (address: 81H)

8 bit stack pointer that is initialized to internal memory of 07H. The user program can initialize it at

any internal RAM location ranging from 07H to FFH.



Auxiliary 1

The AUX1 register includes the data pointer selection bit, the software reset control and the switch to

enable wake-up from power-down using external interrupts.

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

B it 0

AUX1

SRST

GF2

WUPD

DPS



--: Reserved bits



SRST: Software reset



GF2: General purpose flag



WUPD: When set, enables external interrupts driven wake-up from power down



0: fixed „0‟



DPS: Data pointer selector, selects between DPTR0 and DPTR1



P0, P1, P2, P3, P4, P5 registers

P1, P3, P4 and P5 are the SFR registers of Ports 1, 3, 4 and 5 respectively.

Writing a one/zero to a bit in these registers causes the corresponding port output pin to switch

high/low. When a port bit is used as an input the corresponding port SFR must be

set to „1‟.

Ports 3, 4 and 5 are pseudo bidirectional by default, and can be configured to push-pull or pseudo

bidirectional using SFRs P3M, P4M and P5M respectively, as follows: when P4M(i) is set, P4(i) is

configured as push-pull.

ATPL00B Datasheet(PDF) 27 Page - ATMEL Corporation

ATPL00B Datasheet(HTML) 27 Page - ATMEL Corporation

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