S75WS256NDFBAWMB datasheet(114/216 Pages) SPANSION

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S75WS256Nxx Based MCPs

S75WS-N-00_00_A0 February 17, 2005

Data

Sheet

19.3.5

Handshaking

For optimal burst mode performance, the host system must set the appropriate number of wait

states in the flash device depending on the clock frequency.

The autoselect function allows the host system to determine whether the flash device is enabled

for handshaking. See the Autoselect Command Sequence for more information.

19.3.6

Burst Length Configuration

The device supports four different read modes: continuous mode, and 8, 16, and 32 word linear

with or without wrap around modes. A continuous sequence (default) begins at the starting ad-

dress and advances the address pointer until the burst operation is complete. If the highest

address in the device is reached during the continuous burst read mode, the address pointer

wraps around to the lowest address.

For example, an eight-word linear read with wrap around begins on the starting address written

to the device and then advances to the next 8 word boundary. The address pointer then returns

to the 1st word after the previous eight word boundary, wrapping through the starting location.

The sixteen- and thirty-two linear wrap around modes operate in a fashion similar to the eight-

word mode.

Table 19.8 shows the CR0.2-CR0.0 and settings for the four read modes.

Note: Upon power-up or hardware reset the default setting is continuous.

19.3.7

Burst Wrap Around

By default, the device will perform burst wrap around with CR0.3 set to a ‘1’. Changing the CR0.3

to a ‘0’ disables burst wrap around.

19.3.8

RDY Configuration

By default, the device is set so that the RDY pin will output VOH whenever there is valid data on

the outputs. The device can be set so that RDY goes active one data cycle before active data.

CR0.8 determines this setting; 1 for RDY active (default) with data, 0 for RDY active one clock

cycle before valid data.

19.3.9

RDY Polarity

By default, the RDY pin will always indicate that the device is ready to handle a new transaction

with CR0.10 set to a ‘1’. In this case, the RDY pin is active high. Changing the CR0.10 to a ‘0’

sets the RDY pin to be active low. In this case, the RDY pin will always indicate that the device is

ready to handle a new transaction when low.

Table 19.8 Burst Length Configuration

Burst Modes

Address Bits

CR0.2

CR0.1

CR0.0

Continuous

8-word linear

16-word linear

32-word linear

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