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S75WS256NDFBAWMB Datasheet(PDF) 150 Page - SPANSION |
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S75WS256NDFBAWMB Datasheet(HTML) 150 Page - SPANSION |
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150 / 216 page  148 S75WS256Nxx Based MCPs S75WS-N-00_A0 February 17, 2005 Ad van c e Inf o rmation 28 Functional Description The CellularRAM bus interface supports both asynchronous and burst mode transfers. Page mode accesses are also included as a bandwidth-enhancing extension to the asynchronous Read protocol. 28.1 Power-Up Initialization CellularRAM products include an on-chip voltage sensor used to launch the power-up initialization process. Initialization will configure the BCR and the RCR with their default settings (see Table 31.1 and Table 31.5). VCC and VCCQ must be applied simultaneously. When they reach a sta- ble level at or above 1.7V, the device will require 150 µs to complete its self-initialization process. During the initialization period, CE# should remain High. When initialization is complete, the de- vice is Ready for normal operation. Figure 28.2 Power-Up Initialization Timing VCC VCCQ tPU > 150 μs Device Initialization Device ready for normal operation VCC = 1.7 V |
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