RM0319 datasheet(208/368 Pages) STMICROELECTRONICS

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Controller area network ports (CAN)

RM0319

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Doc ID 022640 Rev 3

individually for each CAN node, creating a common bit rate even though the CAN nodes

oscillator periods (fosc) may be different.

The frequencies of these oscillators are not absolutely stable, small variations are caused

by changes in temperature or voltage and by deteriorating components. As long as the

variations remain inside a specific oscillator tolerance range (df), the CAN nodes are able to

compensate for the different bit rates by resynchronising to the bit stream.

According to the CAN specification, the bit time is divided into four segments (see

Figure 74):

●

the synchronisation segment (Sync_Seg)

●

the propagation time segment (Prop_Seg)

●

the phase buffer segment 1 (Phase_Seg1)

●

the phase buffer segment 2 (Phase_Seg2)

Each segment consists of a specific, programmable number of time quanta (see Table 62).

The length of the time quantum (tq), which is the basic time unit of the bit time, is defined by

the CAN controller’s system clock fsys and the Baud Rate Prescaler (BRP): tq = BRP / fsys.

The CAN system clock fsys is the frequency of its CAN_CLK input.

The synchronisation segment is that part of the bit time where edges of the CAN bus level

are expected to occur; the distance between an edge that occurs outside of Sync_Seg and

the Sync_Seg is called the phase error of that edge. The propagation time segment is

intended to compensate for the physical delay times within the CAN network. The phase

buffer segments Phase_Seg1 and Phase_Seg2 surround the sample point. The (re-)

synchronisation jump width (SJW) defines how far a resynchronisation may move the

sample point inside the limits defined by the phase buffer segments to compensate for edge

phase errors.

Figure 74.

Bit timing

Table 62.

Parameters of the CAN Bit Time

Parameter

Range

Remark

BRP

[1...32]

Define the length of the time quantum tq

Sync_Seg

1 tq

Fixed length, synchronisation of bus input to system clock

Prop_Seg

[1..8] tq

Compensates for the physical delay times

Nominal CAN Bit Timing

Sync_seg

Prop_Seg

Phase_Seg1

Phase_Seg2

1 Time Quantum (Tq)

Sample Point

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