CP3SP33SMSSLASHNOPB datasheet(118/407 Pages) TI1

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CP3SP33

SNOSCW5 – MAY 2013

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19.1.1.6 SDAT

The SDAT signal is the multiplexed serial data receive and transmit path between the radio chip and the

CP3SP33.

The SDAT signal is the alternate function of the general-purpose I/O pin PG4. At reset, this pin is in TRI-

STATE mode. Software must enable the alternate function of the PG4 pin to give control over this signal

to the RF interface.

SLE

The SLE pin is the serial load enable output of the serial interface of the CP3SP33.

During write operations (to the radio chip registers), the data received by the shift register of the radio chip

is copied into the address register on the next rising edge of SCLK after the SLE signal goes high.

During read operations (read from the registers), the radio chip releases the SDAT line on the next rising

edge of SCLK after the SLE signal goes high

SLE is the alternate function of the general-purpose I/O pin PG5. At reset, this pin is in TRI-STATE mode.

Software must enable the alternate function of the PG5 pin to give control over this signal to the RF

interface.

19.1.1.7 BTSEQ[3:1]

The BTSEQ[3:1] signals indicate internal states of the Bluetooth sequencer, which are used for interfacing

to some external devices.

19.2 Serial Interface

The radio chip register set can be accessed by the CP3SP33 through the serial interface. The serial

interface uses three pins of the RF interface: SDAT, SCLK, and SLE.

The serial interface of the CP3SP33 always operates as the master, providing the shift clock (SCLK) and

load enable (SLE) signal to the radio chip. The radio chip always acts as the slave.

A 25-bit shift protocol is used to perform read/write accesses to the radio chip internal registers. The

complete protocol is comprised of the following sections:

•

3-bit Header Field

•

Read/Write Bit

•

5-bit Address Field

•

16-bit Data Field

Header

The 3-bit header contains the fixed data 101b (except for Fast Write Operations).

Read/Write Bit

The header is followed by the read/write control bit (R/W). If the Read/Write bit is clear, a write operation

is performed and the 16-bit data portion is copied into the addressed radio chip register.

Address

The address field is used to select one of the radio chip internal registers.

Data

The data field is used to transfer data to or from a radio chip register. The timing is modified for reads, to

transfer control over the data signal from the CP3SP33 to the radio chip.

Figure 19-3 shows the serial interface protocol format.

16 15

Header[2:0]

R/W

Address[4:0]

Data[15:0]

Figure 19-3. Serial Interface Protocol Format

118

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