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FS5502 Datasheet(PDF) 35 Page - NXP Semiconductors |
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FS5502 Datasheet(HTML) 35 Page - NXP Semiconductors |
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35 / 113 page ![]() NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO Bit Symbol Description Overvoltage monitoring on VCOREMON 0 No overvoltage 1 Overvoltage reported on VCOREMON 23 VCOREMON_OV Reset condition: POR / clear on write (write 1) Undervoltage monitoring on VCOREMON 0 No undervoltage 1 Undervoltage reported on VCOREMON 22 VCOREMON_UV Reset condition: POR / clear on write (write 1) Overvoltage monitoring on VDDIO 0 No overvoltage 1 Overvoltage reported on VDDIO 21 VDDIO_OV Reset condition POR / clear on write (write 1) Undervoltage monitoring on VDDIO 0 No undervoltage 1 Undervoltage reported on VDDIO 20 VDDIO_UV Reset condition: POR / clear on write (write 1) Overvoltage monitoring on VMON1 0 No overvoltage 1 Overvoltage reported on VMON1 13 VMON1_OV Reset condition: POR / clear on write (write 1) Undervoltage monitoring on VMON1 0 No undervoltage 1 Undervoltage reported on VMON1 12 VMON1_UV Reset condition: POR / clear on write (write 1) Overvoltage of the internal digital fail-safe reference voltage 0 No overvoltage 1 Overvoltage reported of the internal digital fail-safe reference voltage 10 FS_DIG_REF_OV Reset condition: POR / clear on write (write 1) Drift of the fail-safe OSC 0 No drift 1 Oscillator drift 9 FS_OSC_DRIFT Reset condition: POR / clear on write (write 1) Table 48. FS_OVUVREG_STATUS register bit description FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 35 / 113 |
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