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FS5502 Datasheet(PDF) 14 Page - NXP Semiconductors

Part # FS5502
Description  High voltage PMIC with multiple SMPS and LDO
PDF  113 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS5502 Datasheet(HTML) 14 Page - NXP Semiconductors

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NXP Semiconductors
FS5502
High voltage PMIC with multiple SMPS and LDO
10.2 Main reading registers overview
bit 23
bit 22
bit 21
bit 20
bit 19
bit 18
bit 17
bit 16
Logic
Register name
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
COM_ERR
WU_G
VPRE_G
RESERVED
VBUCK1_G
RESERVED
VBUCK3_G
VLDO1_G
M_FLAG
RESERVED
0
0
0
0
0
I2C_M_CRC
I2C_M_REQ
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
PLL_LOCK_RT
M_MODE
EXT_FIN_
SEL_RT
RESERVED
MAIN_NORMAL
RESERVED
RESERVED
W2DIS
W1DIS
RESERVED
VPRE_PD_DIS
VPDIS
RESERVED
BUCK1DIS
RESERVED
BUCK3DIS
LDO1DIS
RESERVED
M_REG_CTRL1
0
VPEN
RESERVED
BUCK1EN
RESERVED
BUCK3EN
LDO1EN
RESERVED
RESERVED
RESERVED
BUCK1TSDCFG
RESERVED
BUCK3TSDCFG LDO1TSDCFG
RESERVED
M_REG_CTRL2
RESERVED
RESERVED
RESERVED
VPRESRLS[1:0]
RESERVED
VPRESRHS[1:0]
MOD_CONF
FOUT_MUX_SEL[3:0]
FOUT_PHASE[2:0]
M_CLOCK
FOUT_
CLK_SEL
RESERVED
FIN_DIV
MOD_EN
CLK_TUNE[3 :0]
RESERVED
VPREOC_M
RESERVED
BUCK1OC_M
RESERVED
BUCK3OC_M
LDO1OC_M
RESERVED
M_INT_MASK1
RESERVED
RESERVED
RESERVED
BUCK1TSD_M
RESERVED
BUCK3TSD_M
LDO1TSD_M
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
VBOSUVH_M
COM_M
VPRE_
FB_OV_M
M_INT_MASK2
RESERVED
VSUPUV7_M
RESERVED
VPREUVH_M
VSUPUV_M
VSUPUVH_M
WAKE1_M
WAKE2_M
VBOSUVH
RESERVED
VPREOC
BUCK1OC
RESERVED
BUCK3OC
LDO1OC
RESERVED
M_FLAG1
CLK_FIN_
DIV_OK
RESERVED
RESERVED
BUCK1OT
RESERVED
BUCK3OT
LDO1OT
RESERVED
VPRE_FB_OV
VSUPUV7
RESERVED
BUCK1_ST
RESERVED
BUCK3_ST
LDO1_ST
RESERVED
M_FLAG2
VPREUVL
VPREUVH
VSUPUVL
VSUPUVH
WK2RT
WK1RT
WK2FLG
WK1FLG
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
M_VMON_REGX
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
VMON1_REG[2:0]
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
M_LVB1_SVS
RESERVED
RESERVED
RESERVED
LVB1_SVS[4:0]
M_MEMORY0
MEMORY0[15:0]
M_MEMORY1
MEMORY1[15:0]
FM_REV[3:0]
MM_REV[3:0]
Main
M_DEVICEID
M_DEVICEID[7:0]
Table 6. Main reading registers overview
10.3 M_FLAG register
Bit
23
22
21
20
19
18
17
16
Write
0
0
0
0
0
0
0
0
Read
COM_ERR
WU_G
VPRE_G
RESERVED
VBUCK1_G
RESERVED
VBUCK3_G
VLDO1_G
Reset
0
1
1
0
0
0
0
0
Table 7. M_FLAG register bit allocation
Bit
15
14
13
12
11
10
9
8
Write
0
0
0
0
0
0
I2C_M_CRC I2C_M_REQ
Read
RESERVED
0
0
0
0
0
I2C_M_CRC I2C_M_REQ
Reset
0
0
0
0
0
0
0
0
FS5502
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 27 October 2021
14 / 113



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