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FS5502 Datasheet(PDF) 73 Page - NXP Semiconductors |
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FS5502 Datasheet(HTML) 73 Page - NXP Semiconductors |
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73 / 113 page ![]() NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO CLK_TUNE [3:0] Oscillator frequency [MHz] 0000 (default) 20 0001 21 0010 22 0011 23 0100 24 1001 16 1010 17 1011 18 1100 19 Reset condition POR Table 67. Manual frequency tuning configuration 18.4 Spread spectrum The internal oscillator can be modulated with a triangular carrier frequency of 23 kHz or 94 kHz with ±5 % deviation range around the oscillator frequency. The spread spectrum feature can be activated by I2C with the MOD_EN bit and the carrier frequency can be selected by I2C with the MOD_CONF bit. By default, the spread spectrum is disabled. The spread spectrum and the manual frequency tuning functions cannot be used at the same time. The main purpose of the spread spectrum is to improve the EMC performance by spreading the energy of the internal oscillator and VPRE frequency on VBAT frequency spectrum. Consequently, it is recommended to select 23 kHz carrier frequency when VPRE is configured at 455 kHz and 94 kHz when VPRE is configured at 2.2 MHz for the best performance. 18.5 External clock synchronization To synchronize the switching regulators with an external frequency coming from FIN pin, the PLL shall be enabled with OTP_PLL_SEL bit. The FIN pin accepts two ranges of frequency depending on the divider selection to always have CLK clock at the output of the PLL in the working range of the digital blocks from 16 MHz to 24 MHz. When FIN_DIV = 0, the input frequency range must be between 333 kHz and 500 kHz. When FIN_DIV = 1, the input frequency range must be between 2.0 MHz and 3.0 MHz. After the FIN clock divider configuration with FIN_DIV bit, the FIN clock is routed to the PLL input with EXT_FIN_SEL bit. The CLK clock changes from the internal oscillator to FIN external clock with EXT_FIN_SEL bit. So, the configuration procedure is FIN_DIV first, then apply FIN and finally set EXT_FIN_SEL. If FIN is out of range, CLK clock moves back to the internal oscillator and reports the error using the CLK_FIN_DIV_OK bit. When FIN comes back in the range, the configuration procedure described above is executed again. The FOUT pin can be used to synchronize an external device with the FS5502. The frequency sent to FOUT is selected by I2C with the FOUT_MUX_SEL [3:0] bits. FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 73 / 113 |
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