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FS5502 Datasheet(PDF) 80 Page - NXP Semiconductors |
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FS5502 Datasheet(HTML) 80 Page - NXP Semiconductors |
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80 / 113 page ![]() NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO 20.3 Cyclic redundant check An 8 bit CRC is required for each Write and Read I2C command. Computation of a cyclic redundancy check is derived from the mathematics of polynomial division, modulo two. The CRC polynomial used is x^8+x^4+x^3+x^2+1 (identified by 0x1D) with a SEED value of hexadecimal '0xFF' The following table shows an example of CRC encoding HW implementation: CRC calculation using XOR: CRC_7 = XOR (B38, B35, B32, B31, B24, B23, B22, B20, B17, B13, B12, B11, 1, 1, 1) CRC_6 = XOR (B37, B34, B23, B22, B21, B19, B16, B12, B11, B10, 1, 1) CRC_5 = XOR (B39, B36, B33, B30, B29, B22, B21, B20, B18, B15, B11, B10, B9, 1, 1, 1) CRC_4 = XOR (B39, B38, B35, B32, B29, B28, B21, B20, B19, B17, B14, B10, B9, B8, 1, 1, 1, 1) CRC_3 = XOR (B37, B35, B34, B32, B28, B27, B24, B23, B22, B19, B18, B17, B16, B12, B11, B9, B8, 1, 1, 1, 1) CRC_2 = XOR (B39, B38, B36, B35, B34, B33, B32, B27, B26, B24, B21, B20, B18, B16, B15, B13, B12 B10, B8, 1,1,1,1,1,1,1) CRC_1 = XOR (B37, B34, B33, B26, B25, B24, B22, B19, B15, B14, B13, B9, 1, 1, 1) CRC_0 = XOR (B39, B36, B33, B32, B25, B24, B23, B21, B18, B14, B13, B12, B8, 1, 1, 1, 1) CRC results examples: • Main I2C device address: 0x20 • Fail-safe I2C device address: 0x21 aaa-035373 T C0 1*1 0*X 1*X2 1*X3 1*X4 0*X5 0*X6 0*X7 1*X8 Input data T C2 T C3 T C4 T C1 T C5 T C6 T C7 Figure 28. CRC encoder example Device address, R/W, 8 bit (Hex) 00, Register address, 8 bit (Hex) Data MSB, 8 bit (Hex) Data LSB, 8 bit (Hex) CRC, 8 bit 0x40 0x02 0x00 0x00 0x31 0x42 0x01 0xD0 0x0D 0x8C Table 76. CRC results example FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 80 / 113 |
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