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FS5502 Datasheet(PDF) 86 Page - NXP Semiconductors |
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FS5502 Datasheet(HTML) 86 Page - NXP Semiconductors |
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86 / 113 page  NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO aaa-032954 Vdig_FS OTP FAIL-SAFE STATE MACHINE PGOOD DRIVER RESET DRIVER VOLTAGE SUPERVISION VDDIO Vdig_FS VMON1 VCOREMON PGOOD RSTB OSC FS I2C FS VMON1 Figure 31. Fail-safe block diagram 27.2 Voltage supervisor The voltage supervisor is in charge of overvoltage and undervoltage monitoring of VCOREMON, VDDIO and VMON1 input pins. When an overvoltage occurs on a FS5502 regulator monitored by one of these pins, the associated FS5502 regulator is switched off till the fault is removed. The voltage monitoring is active as soon as FS_ENABLE=1 and UV/OV flags are then reported accordingly. 27.2.1 VCOREMON monitoring VCOREMON input pin is dedicated to BUCK1. When overvoltage or undervoltage fault is detected, the fail-safe reaction on RSTB is configurable with the VCOREMON_OV/ UV_FS_IMPACT[1:0] bits during the INIT_FS phase. VCOREMON_OV_FS_IMPACT[1:0] VCOREMON OV impact on RSTB 00 No effect on RSTB 01 Reserved 1x (default) RSTB is asserted Reset condition POR Table 81. VCOREMON error impact configuration VCOREMON_UV_FS_IMPACT[1:0] VCOREMON UV impact on RSTB 00 No effect on RSTB 01 (default) No effect on RSTB 1x RSTB is asserted Reset condition POR TA = −40 °C to 125 °C, unless otherwise specified. VSUP = VSUP_UVH to 36 V, unless otherwise specified. All voltages referenced to ground. Symbol Parameter Min Typ Max Unit VCOREMON_OV_min Overvoltage threshold minimum — +4.5 — % Table 82. VCOREMON electrical characteristics FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 86 / 113 |
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