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XM014429B Datasheet(PDF) 44 Page - Xmos Ltd. |
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XM014429B Datasheet(HTML) 44 Page - Xmos Ltd. |
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44 / 83 page  XU6--QF6B Datasheet Bits Perm Init Description Identier RW Disables write permission on this register SECUR_CFG_DISABLE_ACCESS : RO - Reserved RW Disable access to XCore’s global debug SECUR_CFG_DISABLE_GLOBAL_DEBUG : RO - Reserved RW Disable read access to OTP. SECUR_CFG_OTP_READ_LOCK 8 RW Prevent access to OTP SBPI interface to prevent programming and other functions. SECUR_CFG_OTP_PROGRAM_DISABLE RW Combine OTP into a single address-space for reading. SECUR_CFG_OTP_COMBINED 6 RO - Reserved RW Override boot mode and read boot image from OTP SECUR_CFG_SECURE_BOOT RW Disable JTAG access to the PLL/BOOT conguration registers SECUR_CFG_DISABLE_PLL_JTAG : RO - Reserved RW Disable access to XCore’s JTAG debug TAP SECUR_CFG_DISABLE_XCORE_JTAG x: Security conguration B.6 Ring Oscillator Control RING_OSC_CTRL 0x06 There are four free-running oscillators that clock four counters. The oscillators can be started and stopped using this register. The counters should only be read when the ring oscillator has been stopped for at least core clock cycles (this can be achieved by inserting two nop instructions between the SETPS and GETPS). The counter values can be read using two subsequent registers. The ring oscillators are asynchronous to the xCORE tile clock and can be used as a source of random bits. Bits Perm Init Description Identier : RO - Reserved RW Core ring oscillator enable. RING_OSC_CORE_ENABLE RW Set to to enable the core peripheral ring oscillator. RING_OSC_PERPH_ENABLE x6: Ring Oscillator Control B. Ring Oscillator Value RING_OSC_DATA0 0x07 This register contains the current count of the xCORE Tile Cell ring oscillator. This value is not reset on a system reset. Bits Perm Init Description Identier :6 RO - Reserved : RO Ring oscillator Counter data. RING_OSC_DATA x: Ring Oscillator Value |
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