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XM014429B Datasheet(PDF) 5 Page - Xmos Ltd. |
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XM014429B Datasheet(HTML) 5 Page - Xmos Ltd. |
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5 / 83 page ![]() XU6--QF6B Datasheet XU6--QF6B Features Multicore Microcontroller with Advanced Multi-Core RISC Architecture • 6 real-time logical cores on xCORE tiles • Cores share up to MIPS — Up to MIPS in dual issue mode — Up to MFLOPS • Each logical core has: — Guaranteed throughput of between / and /8 of tile MIPS — 6xbit dedicated registers • high-density 6/-bit instructions — All have single clock-cycle execution (except for divide) — x →6-bit MAC instructions for DSP, arithmetic and cryptographic functions • Vector unit, capable of: — up to eight word, 6 half-word, or byte multiply-adds. — quad complex multiply, or 6 bit-wide multiply-adds. USB PHY, fully compliant with USB . specication Application PLL with fractional control Programmable I/O • general-purpose I/O pins, congurable as input or output — Up to 6 x bit port, x bit port, x 8bit port — xCONNECT link • Port sampling rates of up to 6 MHz with respect to an external clock • 6 channel ends ( per tile) for communication with other cores, on or off-chip • .V IO with programmable drive strength Memory • MB internal single-cycle SRAM (KB per tile) for code and data storage • 8KB internal OTP (shared between tiles or split providing KB per tile) for application boot code Hardware resources • clock blocks (6 per tile) • timers ( per tile) • 8 locks ( per tile) JTAG Module for On-Chip Debug Security Features • Programming lock disables debug and prevents read-back of memory contents • AES bootloader ensures secrecy of IP held on external ash memory Ambient Temperature Range • °C to °C Speed Grade • : 6 MHz; up to MIPS, MFLOP/s, 8. GMACC/s Power Consumption • mA (typical) 6-pin QFN package . mm pitch |
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