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STC12LE5616AD Datasheet(PDF) 107 Page - STCmicro Technology Co,.Ltd

Part # STC12LE5616AD
Description  Enhanced 8051 Central Processing Unit ,1T per machine cycle, faster 8~12 times than the rate of a standard 8051.
PDF  377 Pages
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Manufacturer  STC [STCmicro Technology Co,.Ltd]
Direct Link  http://www.stcmicro.com/
Logo STC - STCmicro Technology Co,.Ltd

STC12LE5616AD Datasheet(HTML) 107 Page - STCmicro Technology Co,.Ltd

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LJMP addr16
Function:
Long Jump
Description:
LJMP causes an unconditional branch to the indicated address, by loading the high-order
and low-order bytes of the PC (respectively) with the second and third instruction bytes. The
destination may therefore be anywhere in the full 64K program memory address space. No
flags are affected.
Example:
The label “JMPADR” is assigned to the instruction at program memory location 1234H. The
instruction,
LJMP JMPADR
at location 0123H will load the program counter with 1234H.
Bytes:
3
Cycles:
2
Encoding:
0 0 0 0
0 0 1 0
addr15-addr8
addr7-addr0
Operation:
LJMP
(PC) ← addr
← addr
addr
15-0
MOV
<dest-byte> , <src-byte>
Function:
Move byte variable
Description:
The byte variable indicated by the second operand is copied into the location specified by the
first operand. The source byte is not affected. No other register or flag is affected.
This is by far the most flexible operation. Fifteen combinations of source and destination
addressing modes are allowed.
Example:
Internal RAM location 30H holds 40H. The value of RAM location 40H is 10H. The data
present at input port 1 is 11001010B (0CAH).
MOV
R0, #30H
;R0< = 30H
MOV
A, @R0
;A < = 40H
MOV
R1, A
;R1 < = 40H
MOV
B, @Rl
;B < = 10H
MOV
@Rl, Pl
;RAM (40H) < = 0CAH
MOV
P2, P1
;P2 #0CAH
leaves the value 30H in register 0,40H in both the Accumulator and register 1,10H in register
B, and 0CAH(11001010B) both in RAM location 40H and output on port 2.
MOV A,Rn
Bytes:
1
Cycles:
1
Encoding:
1 1 1 0
1 r r r
Operation:
MOV
(A) ← (Rn)
← (Rn)
(Rn)
107



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