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STC12LE5616AD Datasheet(PDF) 103 Page - STCmicro Technology Co,.Ltd |
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STC12LE5616AD Datasheet(HTML) 103 Page - STCmicro Technology Co,.Ltd |
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103 / 377 page  JBC bit, rel Function: Jump if Bit is set and Clear bit Description: If the indicated bit is one,branch to the address indicated;otherwise proceed with the next instruction.The bit wili not be cleared if it is already a zero. The branch destination is computed by adding the signed relative-displacement in the third instruction byte to the PC, after incrementing the PC to the first byte of the next instruction. No flags are affected. Note: When this instruction is used to test an output pin, the value used as the original data will be read from the output data latch, not the input pin. Example: The Accumulator holds 56H (01010110B). The instruction sequence, JBC ACC.3, LABEL1 JBC ACC.2, LABEL2 will cause program execution to continue at the instruction identified by the label LABEL2, with the Accumulator modified to 52H (01010010B). Bytes: 3 Cycles: 2 Encoding: 0 0 0 1 0 0 0 0 bit address rel. address Operation: JBC (PC) ← (PC)+ 3 ← (PC)+ 3 (PC)+ 3 IF (bit) = 1 THEN (bit) ← 0 ← 0 (PC) ← (PC) + rel ← (PC) + rel (PC) + rel JC rel Function: Jump if Carry is set Description: If the carry flag is set, branch to the address indicated; otherwise proceed with the next instruction. The branch destination is computed by adding the signed relative-displacement in the second instruction byte to the PC, after incrementing the PC twice.No flags are affected. Example: The carry flag is cleared. The instruction sequence, JC LABEL1 CPL C JC LABEL2s will set the carry and cause program execution to continue at the instruction identified by the label LABEL2. Bytes: 2 Cycles: 2 Encoding: 0 1 0 0 0 0 0 0 rel. address Operation: JC (PC) ← (PC)+ 2 ← (PC)+ 2 (PC)+ 2 IF (C) = 1 THEN (PC) ← (PC) + rel ← (PC) + rel (PC) + rel 103 |
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