STC12LE5616AD datasheet(112/377 Pages) STC

112 / 377 page

MOVC A,@A+PC

Bytes:

Cycles:

Encoding:

1 0 0 0

0 0 1 1

Operation:

MOVC

(PC) ← (PC)+1

← (PC)+1

(A) ← ((A)+(PC))

← ((A)+(PC))

((A)+(PC))

MOVX

<dest-byte> , <src-byte>

Function:

Move External

Description:

The MOVX instructions transfer data between the Accumulator and a byte of external data

memory, hence the “X” appended to MOV. There are two types of instructions, differing in

whether they provide an eight-bit or sixteen-bit indirect address to the external data RAM.

In the first type, the contents of R0 or R1 in the current register bank provide an eight-bit

address multiplexed with data on P0. Eight bits are sufficient for external I/O expansion

decoding or for a relatively small RAM array. For somewhat larger arrays, any output port

pins can be used to output higher-order address bits. These pins would be controlled by an

output instruction preceding the MOVX.

In the second type of MOVX instruction, the Data Pointer generates a sixteen-bit address.

P2 outputs the high-order eight address bits (the contents of DPH) while P0 multiplexes the

low-order eight bits (DPL) with data. The P2 Special Function Register retains its previous

contents while the P2 output buffers are emitting the contents of DPH. This form is faster and

more efficient when accessing very large data arrays (up to 64K bytes), since no additional

instructions are needed to set up the output ports.

It is possible in some situations to mix the two MOVX types. A large RAM array with its

high-order address lines driven by P2 can be addressed via the Data Pointer, or with code to

output high-order address bits to P2 followed by a MOVX instruction using R0 or R1.

Example:

An external 256 byte RAM using multiplexed address/data lines (e.g., an Intel 8155 RAM/

I/O/Timer) is connected to the 8051 Port 0. Port 3 provides control lines for the external

RAM. Ports 1 and 2 are used for normal I/O. Registers 0 and 1 contain 12H and 34H.

Location 34H of the external RAM holds the value 56H. The instruction sequence,

MOVX

A, @R1

MOVX

@R0, A

copies the value 56H into both the Accumulator and external RAM location 12H.

MOVX A,@Ri

Bytes:

Cycles:

Encoding:

1 1 1 0

0 0 1 i

Operation:

MOVX

(A) ← ((Ri))

← ((Ri))

((Ri))

112

STC12LE5616AD Datasheet(PDF) 112 Page - STCmicro Technology Co,.Ltd

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