PI7C8150AND datasheet(95/111 Pages) PERICOM

95 / 111 page

PI7C8150A

2-PORT PCI-TO-PCI BRIDGE

Page 95 of 111

APRIL 2006 – Revision 1.1

14.1.43

RETRY COUNTER REGISTER – OFFSET 78h

Bit

Function

Type

Description

31:0

Retry Counter

R/W

Holds the maximum number of attempts that PI7C8150A will try

before reporting retry timeout. Retry count set at 2

24 PCI clocks.

Default is 0100 0000h.

14.1.44

PRIMARY MASTER TIMEOUT COUNTER – OFFSET 80h

Bit

Function

Type

Description

15:0

Primary Timeout

R/W

Primary timeout occurs after 2

15 PCI clocks.

Reset to 8000h.

14.1.45

SECONDARY MASTER TIMEOUT COUNTER – OFFSET 80h

Bit

Function

Type

Description

31:16

Secondary

Timeout

R/W

Secondary timeout occurs after 2

15 PCI clocks.

Reset to 8000h.

14.1.46

CAPABILITY ID REGISTER – OFFSET B0h

Bit

Function

Type

Description

7:0

Capability ID

R/O

Capability ID for slot identification

00h: Reserved

01h: PCI Power Management (PCIPM)

02h: Accelerated Graphics Port (AGP)

03h: Vital Product Data (VPD)

04h: Slot Identification (SI)

05h: Message Signaled Interrupts (MSI)

06h: Compact PCI Hot Swap (CHS)

07h – 255h: Reserved

Reset to 04h

14.1.47

NEXT POINTER REGISTER – OFFSET B0h

Bit

Function

Type

Description

15:8

Next Pointer

R/O

Reset to 0000 0000: next pointer (00h if MS0=0 and MS1=1, or

MS0=1)

06-0057

PI7C8150AND Datasheet(PDF) 95 Page - Pericom Semiconductor Corporation

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