Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

PI7C8150AND Datasheet(PDF) 97 Page - Pericom Semiconductor Corporation

Part # PI7C8150AND
Description  2-PORT PCI-to-PCI BRIDGE
PDF  111 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  PERICOM [Pericom Semiconductor Corporation]
Direct Link  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI7C8150AND Datasheet(HTML) 97 Page - Pericom Semiconductor Corporation

Back Button PI7C8150AND Datasheet HTML 93Page - Pericom Semiconductor Corporation PI7C8150AND Datasheet HTML 94Page - Pericom Semiconductor Corporation PI7C8150AND Datasheet HTML 95Page - Pericom Semiconductor Corporation PI7C8150AND Datasheet HTML 96Page - Pericom Semiconductor Corporation PI7C8150AND Datasheet HTML 97Page - Pericom Semiconductor Corporation PI7C8150AND Datasheet HTML 98Page - Pericom Semiconductor Corporation PI7C8150AND Datasheet HTML 99Page - Pericom Semiconductor Corporation PI7C8150AND Datasheet HTML 100Page - Pericom Semiconductor Corporation PI7C8150AND Datasheet HTML 101Page - Pericom Semiconductor Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 97 / 111 page
background image
PI7C8150A
2-PORT PCI-TO-PCI BRIDGE
Page 97 of 111
APRIL 2006 – Revision 1.1
14.1.53
POWER MANAGEMENT DATA REGISTER – OFFSET E0h
Bit
Function
Type
Description
1:0
Power State
R/W
Indicates the current power state of PI7C8150A. If an
unimplemented power state is written to this register, PI7C8150A
completes the write transaction, ignores the write data, and does not
change the value of the field. Writing a value of D0 when the
previous state was D3 cause a chip reset without asserting
S_RESET_L
00: D0 state
01: not implemented
10: not implemented
11: D3 state
Reset to 0
7:2
Reserved
R/O
Read as 0
8
PME# Enable
R/O
Read as 0 as PI7C8150A does not support the PME# pin.
12:9
Data Select
R/O
Read as 0 as the data register is not implemented.
14:13
Data Scale
R/O
Read as 0 as the data register is not implemented.
15
PME status
R/O
Read as 0 as the PME# pin is not implemented.
14.1.54
CAPABILITY ID REGISTER – OFFSET E4h
Bit
Function
Type
Description
7:0
Capability ID
R/O
00h: Reserved.
01h: PCI Power Management (PCIPM)
02h: Accelerated Graphics Port (AGP)
03h: Vital Product Data (VPD)
04h: Slot Identification (SI)
05h: Message Signaled Interrupts (MSI)
06h: Compact PCI Hot Swap
07h-255h: Reserved
14.1.55
NEXT POINTER REGISTER – OFFSET E4h
Bit
Function
Type
Description
15:8
Next Pointer
R/O
End of pointer (00h)
15
BRIDGE BEHAVIOR
A PCI cycle is initiated by asserting the FRAME_L signal. In a bridge, there are a number
of possibilities. Those possibilities are summarized in the table below:
06-0057



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com