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PI7C8150AND Datasheet(PDF) 101 Page - Pericom Semiconductor Corporation |
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PI7C8150AND Datasheet(HTML) 101 Page - Pericom Semiconductor Corporation |
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101 / 111 page ![]() PI7C8150A 2-PORT PCI-TO-PCI BRIDGE Page 101 of 111 APRIL 2006 – Revision 1.1 The instruction determines the test to be performed, the test data register to be accessed, or both. The IR is two bits wide. When the IR is selected, the most significant bit is connected to TDI, and the least significant bit is connected to TDO. The value presented on the TDI pin is shifted into the IR on each rising edge of TCK. The TAP controller captures fixed parallel data (1101 binary). When a new instruction is shifted in through TDI, the value 1101(binary) is always shifted out through TDO, least significant bit first. This helps identify instructions in a long chain of serial data from several devices. Upon activation of the TRST_L reset pin, the latched instruction asynchronously changes to the id code instruction. When the TAP controller moves into the test state other than by reset activation, the opcode changes as TDI shifts, and becomes active on the falling edge of TCK. 16.2 BOUNDARY SCAN INSTRUCTION SET The PI7C8150A supports three mandatory boundary-scan instructions (BYPASS, SAMPLE and EXTEST). The table shown below lists the PI7C8150A’s boundary-scan instruction codes. Table 16-1. TAP Pins Instruction / Requisite Opcode (binary) Description EXTEST IEEE 1149.1 Required 00000 EXTEST initiates testing of external circuitry, typically board- level interconnects and off chip circuitry. EXTEST connects the boundary-scan register between TDI and TDO. When EXTEST is selected, all output signal pin values are driven by values shifted into the boundary-scan register and may change only of the falling edge of TCK. Also, when EXTEST is selected, all system input pin states must be loaded into the boundary-scan register on the rising-edge of TCK. SAMPLE IEEE 1149.1 Required 0001 SAMPLE performs two functions: A snapshot of the sample instruction is captured on the rising edge of TCK without interfering with normal operation. The instruction causes boundary-scan register cells associated with outputs to sample the value being driven. On the falling edge of TCK, the data held in the boundary- scan cells is transferred to the slave register cells. Typically, the slave latched data is applied to the system outputs via the EXTEST instruction. INTSCAN 00010 Enable internal SCAN test CLAMP 00100 CLAMP instruction allows the state of the signals driven from component pins to be determined from the boundary-scan register while the bypass register is selected as the serial path between TDI and TDO. The signal driven from the component pins will not change while the CLAMP instruction is selected. BYPASS 11111 BYPASS instruction selects the one-bit bypass register between TDI and TDO pins. 0 (binary) is the only instruction that accesses the bypass register. While this instruction is in effect, all other test data registers have no effect on system operation. Test data registers with both test and system functionality performs their system functions when this instruction is selected. 06-0057 |
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