ATAM862 datasheet(96/110 Pages) ATMEL

96 / 110 page

4554E–4BMCU–05/06

ATAM862-3

24.6

Serial Interface

The EEPROM uses a two-wire serial interface (TWI) to the microcontroller for read and write

accesses to the data. It is considered to be a slave in all these applications. That means, the

controller has to be the master that initiates the data transfer and provides the clock for transmit

and receive operations.

The serial interface is controlled by the microcontroller which generates the serial clock and con-

trols the access via the SCL line and SDA line. SCL is used to clock the data into and out of the

device. SDA is a bi-directional line that is used to transfer data into and out of the device. The

following protocol is used for the data transfers.

24.6.1

Serial Protocol

• Data states on the SDA line changing only while SCL is low.

• Changes on the SDA line while SCL is high are interpreted as START or STOP condition.

• A START condition is defined as high to low transition on the SDA line while the SCL line is

high.

• A STOP condition is defined as low to high transition on the SDA line while the SCL line is

high.

• Each data transfer must be initialized with a START condition and terminated with a STOP

condition. The START condition wakes the device from standby mode and the STOP

condition returns the device to standby mode.

• A receiving device generates an acknowledge (A) after the reception of each byte. This

requires an additional clock pulse, generated by the master. If the reception was successful

the receiving master or slave device pulls down the SDA-line during that clock cycle. If an

acknowledge is not detected (N) by the interface in transmit mode, it will terminate further

data transmissions and go into receive mode. A master device must finish its read operation

by a non-acknowledge and then send a stop condition to bring the device into a known state.

Figure 24-20. MCL Protocol

• Before the START condition and after the STOP condition the device is in standby mode and

the SDA line is switched as input with pull-up resistor.

• The control byte that follows the START condition determines the following operation. It

consists of the 5-bit row address, 2 mode control bits and the READ/NWRITE bit that is used

to control the direction of the following transfer. A "0" defines a write access and a "1" a read

access.

Start

condition

Data

valid

Data

change

Data/

acknowledge

valid

Stop

condition

SCL

SDA

Stand

Stand-

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