EP1M350 datasheet(50/86 Pages) ALTERA

50 / 86 page

Altera Corporation

Mercury Programmable Logic Device Family Data Sheet

In Mercury device IOEs, the OE register is a multi-purpose register

available as a second input or output register. When using the IOE for

double data rate inputs, the input register and OE register are

automatically configured as input registers to clock input double rate data

on alternating edges. An input latch is also used within the IOE for DDR

input acquisition. The latch holds the data that is present during the clock

high times, driving it to the OE register. This allows the OE register and

input register to clock both bits of data into LEs, synchronous to the same

clock edge (either rising or falling). Figure 27 shows an IOE configured for

DDR input.

Figure 27. IOE Configured for DDR Input

CLRN/PRN

ENA

Chip-Wide Reset

OE Register

CLRN/PRN

ENA

PRN

ENA

Input Register

Input Pin to Input

VCCIO

Optional

PCI Clamp

Programmable

Pull-Up

Priority Row (for Associated LAB Row)

Row (for Associated LAB Row)

Column and

Priority

Column

Associated LAB

Local Interconnect

Two Row

Local Fast

Signals

Six Fast

Global

Signals

Four

Dedicated

Clocks

Bus-Hold

Circuit

Latch

EP1M350 Datasheet(PDF) 50 Page - Altera Corporation

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