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EP1M350 Datasheet(PDF) 20 Page - Altera Corporation

Part # EP1M350
Description  Programmable Logic Device Family
PDF  86 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP1M350 Datasheet(HTML) 20 Page - Altera Corporation

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Altera Corporation
Mercury Programmable Logic Device Family Data Sheet
Figure 8. Normal-Mode LE
Note (1)
Notes to Figure 8:
(1)
LEs in normal mode support register packing.
(2)
When using the carry-in in normal mode, the packed register feature is unavailable.
(3)
There are two LAB-wide clock enables per LAB in addition to LE-specific clock enables.
Arithmetic Mode
The arithmetic mode is ideal for implementing adders, accumulators, and
comparators. A LE in arithmetic mode contains four 2-input LUTs. The
first two 2-input LUTs compute two summations based on a possible
carry of 1 or 0; the other two LUTs generate carry outputs for the two
possible chains of the carry-select look-ahead (CSLA) circuitry. As shown
in Figure 9, the LAB carry-in signal selects the appropriate carry-in chain
(either carry-in0 or carry-in1). The logic level of the chain selected
in turn selects which parallel sum is generated as a combinatorial or
registered output. For example, when implementing an adder, this output
is the signal comprised of the sum data1 + data2 + carry, where carry is
0
or 1. The other two LUTs use the data1 and data2 signals to generate
two possible carry-out signals—one for a carry of 1 and the other for a
carry of 0. The carry-in0 signal acts as the carry select for the
carry-out0
output; carry-in1 acts as the carry select for the
carry-out1
output. LEs in arithmetic mode can drive out registered and
unregistered versions of the LUT output. Figure 9 shows a Mercury LE in
arithmetic mode.
PRN/ALDn
CLRN
D
Q
4-Input
LUT
LE-Out
LE-Out
LE-Out
ENA
data1
data2
data3
data4
Carry-In from
Previous LE (2)
Registered
Output
Combinatorial
Output
LAB-Wide Clock Enable (3)



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