EP1M350 datasheet(54/86 Pages) ALTERA

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Altera Corporation

Mercury Programmable Logic Device Family Data Sheet

Bus Hold

Each Mercury device I/O pin provides an optional bus-hold feature.

When this feature is enabled for an I/O pin, the bus-hold circuitry weakly

holds the signal at its last driven state. By holding the last driven state of

the pin until the next input signal is present, the bus-hold feature

eliminates the need to add external pull-up or pull-down resistors to hold

a signal level when the bus is tri-stated. The bus-hold circuitry also pulls

undriven pins away from the input threshold voltage where noise can

cause unintended high-frequency switching. This feature can be selected

individually for each I/O pin. The bus-hold output will drive no higher

than VCCIO to prevent overdriving signals. If the bus-hold feature is

enabled, the programmable pull-up option cannot be used. The bus-hold

feature should also be disabled if open-drain outputs are used with the

GTL+ I/O standard.

The bus-hold circuitry weakly pulls the signal level to the last driven state

through a resistor with a nominal resistance (RBH) of approximately 8 kΩ.

Table 42 gives specific sustaining current that will be driven through this

resistor and overdrive current that will identify the next driven input

level. This information is provided for each VCCIO voltage level.

The bus-hold circuitry is active only after configuration. When going into

user mode, the bus-hold circuit captures the value on the pin present at

the end of configuration.

Programmable Pull-Up Resistor

Each Mercury device I/O pin provides an optional programmable pull-

up resistor during user mode. When this feature is enabled for an I/O pin,

the pull-up resistor (50 k

Ω) weakly holds the output to the V

CCIO level of

the bank that the output pin resides in.

I/O Row Bands

The I/O row bands are one of the advanced features of the Mercury

architecture. All IOEs are grouped in I/O row bands across the device.

The number of I/O row bands depends on the Mercury device size. The

I/O row bands are designed for flip-chip technology, allowing I/O pins

to be distributed across the entire chip, not only in the periphery. This

array driver technology allows higher I/O pin density (I/O pins per

device area) than peripheral I/O pins.

EP1M350 Datasheet(PDF) 54 Page - Altera Corporation