EP1M350 datasheet(80/86 Pages) ALTERA

80 / 86 page

Altera Corporation

Mercury Programmable Logic Device Family Data Sheet

Tables 44 and 45 describe the Mercury device’s external timing

parameters.

Notes to Tables 44 and 45:

(1)

These timing parameters are sample-tested only.

(2)

All timing parameters are either to and/or from pins, including global clock pins.

Table 44. Mercury External Timing Parameters

Notes (1), (2)

Symbol

Parameter

Conditions

tINSU

Setup time with global clock at IOE register

tINH

Hold time with global clock at IOE register

tOUTCO

Clock-to-output delay with global clock at IOE register

C1 = 35 pF

tINSUPLL

Setup time with PLL clock at IOE input register

tINHPLL

Hold time with PLL clock at IOE input register

tOUTCOPLL

Clock-to-output delay with PLL clock at IOE output register

C1 = 35 pF

Table 45. Mercury External Bidirectional Timing Parameters

Notes (1), (2)

Symbol

Parameter

Conditions

tINSUBIDIR

Setup time for bidirectional pins with gobal clock at IOE input register

tINHBIDIR

Hold time for bidirectional pins with global clock at IOE input register

tOUTCOBIDIR

Clock-to-output delay for bidirectional pins with global clock at IOE

output register

C1 = 35 pF

tXZBIDIR

Synchronous IOE output enable register to output buffer disable delay C1 = 35 pF

tZXBIDIR

Synchronous IOE output enable register output buffer enable delay

C1 = 35 pF

tINSUBIDIRPLL

Setup time for bidirectional pins with PLL clock at IOE input register

tINHBIDIRPLL

Hold time for bidirectional pins with PLL clock at IOE input register

tOUTCOBIDIRPLL

Clock-to-output delay for bidirectional pins with PLL clock at IOE output

C1 = 35 pF

tXZBIDIRPLL

Synchronous IOE output enable register to output buffer disable delay

with PLL

C1 = 35 pF

tZXBIDIRPLL

Synchronous IOE output enable register output buffer enable delay

with PLL

C1 = 35 pF

EP1M350 Datasheet(PDF) 80 Page - Altera Corporation

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