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EP1M350 Datasheet(PDF) 14 Page - Altera Corporation

Part # EP1M350
Description  Programmable Logic Device Family
PDF  86 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP1M350 Datasheet(HTML) 14 Page - Altera Corporation

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Altera Corporation
Mercury Programmable Logic Device Family Data Sheet
1
Mercury device HSDI performance is finalized for certain speed
grades. Also, the industrial-grade CDR specification is the same
as the -6 speed grade for commercial-grade CDR specification.
See Table 8.
Notes to Table 8:
(1)
The -6 speed grade specifications apply for both commercial and industrial devices.
(2)
EP1M350 devices can support any 8 channels at 1.25 Gbps. The other 10 channels must run at 1.0 Gbps or less.
Logic &
Interconnect
Mercury device logic is implemented in LEs. LE resources are used
differently according to specific operating modes and the type of logic
function being implemented. LEs are grouped into LABs in a row-based
architecture. The multi-level FastTrack Interconnect structure provides
the routing connection between LEs, ESBs, and IOEs.
Logic Array Block
Each LAB consists of 10 LEs, LE carry chains, multiplier circuitry, LAB
control signals, local interconnect, and FastLUT connection lines. The
local interconnect transfers signals between LEs within the same or
adjacent LABs. FastLUT connections transfer the output of one LE to the
adjacent LE for ultra-fast sequential LE connections within the same LAB.
The Quartus II Compiler places associated logic within a LAB or adjacent
LABs, allowing the use of fast local and FastLUT connections for high
performance. Figure 5 shows the Mercury LAB structure.
Table 8. CDR & Source-Synchronous Data Rates
Device
Speed Grade
Number of Channels
Maximum CDR Data
Rate (Gbps)
Maximum Source-
Synchronous Data
Rate (Mbps)
EP1M120
-5
8
1.25
840
-6 (1)
8
1.25
840
-7
8
1.0
840
EP1M350
-5
18
1.25
840
-6 (1)
8 (2)
1.25
840
10 (2)
1.0
840
-7
18
1.0
840



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