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MC68HC705P9CS Datasheet(PDF) 119 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS Datasheet(HTML) 119 Page - Freescale Semiconductor, Inc |
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119 / 160 page  Serial Input/Output Port (SIOP) Introduction MC68HC705P9 — Rev. 4.0 Technical Data MOTOROLA Serial Input/Output Port (SIOP) 119 Figure 10-1. SIOP Block Diagram Addr. Name Bit 7 6 54 32 1 Bit 0 $000A SIOP Control Register (SCR) See page 125. Read: 0 SPE 0 MSTR 0 0 0 0 Write: Reset: 00 00 00 00 $000B SIOP Status Register (SSR) See page 126. Read: SPIF DCOL 0 0 0 0 0 0 Write: Reset: 00 00 00 00 $000C SIOP Data Register (SDR) See page 127. Read: Bit 7 6 54 32 1 Bit 0 Write: Reset: Unaffected by reset = Unimplemented Figure 10-2. SIOP I/O Register Summary SPE SPIF DCOL MSTR SIOP 765 43210 SIOP DATA REGISTER CLOCK LOGIC DIVIDE BY 4 PIN CONTROL LOGIC AND DDR SIOP CONTROL INTERNAL CLOCK (fOSC ÷ 2) INTERNAL BUS FROM MOR MS PB5/SDO PB7/SCK PB6/SDI Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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