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C6416 Datasheet(PDF) 114 Page - Texas Instruments |
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C6416 Datasheet(HTML) 114 Page - Texas Instruments |
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114 / 134 page  SMJ320C6414, SMJ320C6415, SMJ320C6416 FIXEDPOINT DIGITAL SIGNAL PROCESSORS SGUS050A − JANUARY 2004 − REVISED MARCH 2004 114 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PERIPHERAL COMPONENT INTERCONNECT (PCI) TIMING [C6415 AND C6416 ONLY] (CONTINUED) timing requirements for PCI inputs (see Figure 49) NO. MIN MAX UNIT 5 tsu(IV-PCLKH) Setup time, input valid before PCLK high 7 ns 6 th(IV-PCLKH) Hold time, input valid after PCLK high 0 ns switching characteristics over recommended operating conditions for PCI outputs (see Figure 49) NO. PARAMETER MIN MAX UNIT 1 td(PCLKH-OV) Delay time, PCLK high to output valid 11 ns 2 td(PCLKH-OIV) Delay time, PCLK high to output invalid 2 ns 3 td(PCLKH-OLZ) Delay time, PCLK high to output low impedance 2* ns 4 td(PCLKH-OHZ) Delay time, PCLK high to output high impedance 28* ns *This parameter is not production tested. Valid PCLK 5 PCI Output PCI Input 3 Valid 2 6 1 4 Figure 49. PCI Input/Output Timing |
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