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CP3SP33SMS/NOPB Datasheet(PDF) 145 Page - Texas Instruments

Part # CP3SP33SMS/NOPB
Description  Connectivity Processor with Cache, DSP, and Bluetooth짰, USB, and Dual CAN Interfaces
PDF  407 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CP3SP33SMS/NOPB Datasheet(HTML) 145 Page - Texas Instruments

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SNOSCW5 – MAY 2013
20.11.6 VoIP and 3G Telephony
This application can require G.722 support with sample rates up to 16 kHz in 16-bit mode. The ADC and
DAC must be used at these rates with the compression being handled by a DSP. The delay caused by the
G.722 algorithm and FIFO depths should be minimized to ensure the group delay specifications are met.
20.12 Tuning the Compensation Filter
For unusual sample rates or where the circuit is used to drive a non-linear audio system, it is
straightforward to calculate the required compensation filter coefficients. First, replace all coefficients with
zero except C2, which should be replaced with a value of 20000 (to ensure that the output frequency
response is not limited by headroom). This eliminates the effect of the compensation filter and a frequency
sweep on the input to the DAC will produce the uncompensated response of the system. The inverse of
this response can then be used to calculate the required coefficients using the inverse discrete fourier
transform:
(5)
In which HD is the desired response (from ω up to ωcutoff), and n is the tap number. In practice, this
requires minor manual optimization of the coefficient LSBs to obtain acceptable ripple across the newly
optimized passband.
20.13 Obtaining Maximum DAC SNR
The noise floor of the DAC increases at frequencies above Fs/2 and care should be taken at sample rates
below 44.1 kHz, because this reduces SNR. For maximum SNR when the DAC is operated at 8 kHz, a
low-pass filter can be used to limit the bandwidth of the analog audio output to 4 kHz before driving a
system with wider bandwidth.
If the same DAC channel is used for both 8 kHz and 44.1/48 kHz sample rates, the 8-kHz signal can be
interpolated in software to a higher rate. This saves the component cost of the external filter at the
expense of group delay.
These modifications are not required in typical Bluetooth applications, because the signal noise floor is far
higher than the DAC noise to 20 kHz, and speaker bandwidths are not much wider than 4–6 kHz. It
becomes an issue when using digital attenuation on voice band signals before the DAC. This reduces
SNR linearly and the relative noise can become audible. It is recommended that the DAC is operated at
full dynamic range and attenuation is performed at the last stage in the analog signal path.
21 USB Controller
The dual-role USB controller may be used as either the host or the peripheral in point-to-point
communications with another USB device. The USB controller is a peripheral on the CPU core AHB bus.
An on-chip USB transceiver supports full-speed (12 Mbps) operation.
The USB controller complies with both the USB 2.0 specification (full-speed mode) and with the On-The-
Go supplement to the specification. USB On-The-Go has been introduced to provide a low-cost
connectivity solution for consumer devices such as mobile phones, PDAs, digital cameras, and MP3
players. Devices that are solely peripherals initiate transfers through a Session Request Protocol (SRP),
while dual-role devices support both SRP and Host Negotiation Protocol (HNP).
The USB controller is configured for up to seven endpoint pipes, one bidirectional pipe for Endpoint 0 and
unidirectional transmit and receive pipes for Endpoints 1, 2, and 3. The endpoints can be individually
programmed for Bulk/Interrupt or Isochronous transfers. (Whether these endpoints are used for IN
transactions or for OUT transactions at any time will depend on whether the device is currently being used
as a USB peripheral or as the host for point-to-point communications with another USB peripheral.)
Copyright © 2013, Texas Instruments Incorporated
USB Controller
145
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