CP3SP33SMSSLASHNOPB datasheet(148/407 Pages) TI1

148 / 407 page

UVCC

+3.3V

USB OTG

Connector

UGND

DS341

D+

D-

CP3SP33

1 2

4 5

VBUS

IDPULLUP

IDDIG

DRVVBUS

+3.3V

+5V

N Ÿ

CP3SP33

SNOSCW5 – MAY 2013

www.ti.com

Figure 21-3. USB On-The-Go Connector Interface

For point-to-point communications, the device may also be required to power the VBUS to 5V as the A

device of the connection (source of power and default host) or, as the B device (default peripheral), to be

able to wake the A device by charging VBUS to 2V. A 100k

Ω pulldown resistor on the DRVVBUS output is

recommended to ensure that VBUS is not pulled high during reset.

Whether the USB controller initially operates in Host mode or in Peripheral mode depends on whether it is

being used in an A device or a B device, which in turn depends on whether the IDDIG input is low or high.

When the USB controller is operating as an A device, it is initially configured to operate in Host mode.

When operating as a B device, the USB controller is initially configured to operate in Peripheral mode.

However, the HOSTREQ bit in the DEVCTL register can be used to request that a B device becomes the

Host the next time there is no activity on the USB bus.

The IDDIG input reflects the state of the ID pin of the device’s mini-AB receptacle, with IDDIG being low

indicating an A plug and operation as an A device, and IDDIG being high indicating a B plug and operation

as a B device.

Information on whether the USB controller is acting as an A device or as a B device is indicated in the

DEVCTL register, along with information about the level of VBUS relative to the high and low voltage

thresholds used to signal Session Start and Session End.

21.3 USB Controller Register Set

The USB controller common registers affect all endpoints. In addition, for each endpoint there is an

endpoint-specific register bank. There is an indexed addressing mechanism for accessing the endpoint-

specific register banks, and there are also non-indexed images of each register bank. Either the indexed

or the non-indexed images may be used to access these registers. The INDEX register selects the

Table 21-2 lists the USB controller common registers, Table 21-3 lists the endpoint-specific registers in a

bank, and Table 21-4 lists the register banks.

Table 21-2. USB Common Interface Registers

NAME

ADDRESS

DESCRIPTION

FADDR

FF 0800h

Function Address Register

POWER

FF 0801h

Power Management Register

INTRTX

FF 0802h

Interrupt Register for Endpoint 0 and Tx Endpoints 1-3

INTRRX

FF 0804h

Interrupt Register for Rx Endpoints 1-3

148

USB Controller

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