CP3SP33SMSSLASHNOPB datasheet(150/407 Pages) TI1

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CP3SP33

SNOSCW5 – MAY 2013

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21.3.1 Function Address Register (FADDR)

The FADDR register is an 8-bit, read/write register that holds the function address. When the USB

controller is in Host mode, this register should be loaded with the value sent in a SET_ADDRESS

command during device enumeration as the address for the peripheral device. When the USB controller is

being used in Peripheral mode, this register should be loaded with the address received through a

SET_ADDRESS command, which will then be used for decoding the function address in subsequent

token packets. The new address will not take effect immediately, because the host will still be using the

old address for the Status stage of the device request. The USB controller will continue to use the old

address for decoding packets until the device request has completed. At reset, this register is cleared to

00h.

Reserved

FUNCADDR

The Function Address field holds the 7-bit address of the peripheral part of the

transaction.

21.3.2 Power Register (POWER)

The POWER register is an 8-bit, read/write register that is used for controlling Suspend and Resume

signaling, and some basic operational aspects of the USB controller. At reset, this register is initialized to

20h.

Reserved

ISOUPDATE

SOFTCONN

RESET

RESUME

SUSPENDMODE

ENABLESUSPENDM

(Must be 0)

ENABLESUSPENDM

The Enable Suspend Mode bit is used to shut down the USB transceiver in

Suspend mode to save power.

0 – USB transceiver always enabled.

1 – USB transceiver disabled in Suspend mode.

SUSPENDMODE

The Suspend Mode bit is set by software to enter Suspend mode (Host mode)

or by hardware when Suspend mode is entered (Peripheral mode). It will be

cleared when the INTRUSB register is read (as a result of receiving a Suspend

interrupt). It will also be cleared if Suspend mode is exited by setting the

Resume bit to initiate a remote wake-up.

0 – Suspend mode has not been entered.

1 – Suspend mode has been entered (Peripheral mode), or software has

requested entry into Suspend mode (Host mode).

RESUME

The Resume bit is set by software to generate Resume signaling on the USB to

perform remote wake-up from Suspend mode. Once set, it should be left set for

approximately 10 ms (at least 1 ms and no more than 15 ms), then cleared. In

Host mode, this bit is set by hardware when Resume signaling from the

peripheral is detected while the Host is in Suspend mode.

0 – No Resume signaling.

1 – Generate Resume signaling or Resume signaling detected.

RESET

The Reset bit can be used to determine when Reset signaling is present on the

USB. It is set when Reset signaling is detected and remains set until the bus

reverts to an idle state. This bit is read/write in Host mode, and read only in

Peripheral mode.

0 – No Reset signaling detected.

1 – Reset signaling detected.

150

USB Controller

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