XM014034B datasheet(22/83 Pages) XMOS

22 / 83 page

XU6--QF6A Datasheet

Boot from OTP

If an xCORE tile is set to use secure boot (see Figure ), the boot image is read from

address of the OTP memory in the tile’s security module.

This feature can be used to implement a secure bootloader which loads an encrypted

image from external ash, decrypts and CRC checks it with the processor, and discon-

tinues the boot process if the decryption or CRC check fails. XMOS provides a default

secure bootloader that can be written to the OTP along with secret decryption keys.

Each tile can be congured to have its own individual OTP memory, and hence some tiles

can be booted from OTP while others are booted from SPI or the channel interface. This

enables systems to be partially programmed, dedicating one or more tiles to perform a

particular function, leaving the other tiles user-programmable.

Memory

The address space as seen by the each core is shown in Figure . This address space

comprises internal RAM (Section

. ), a software dened memory (Section

. ), and

the boot ROM.

Outside the normal address space the device contains a one-time-programmable mem-

ory (Section . ). The OTP memory cannot be read and written directly from the instruc-

tion set, instead is accessed through a library.

0008 0000

0010 0000

Internal RAM

FFF0 0000

FFF0 4000

Boot ROM

4000 0000

8000 0000

Software memory

Figure

Address space

XM014034B Datasheet(PDF) 22 Page - Xmos Ltd.