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XM014034B Datasheet(PDF) 46 Page - Xmos Ltd. |
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XM014034B Datasheet(HTML) 46 Page - Xmos Ltd. |
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46 / 83 page ![]() XU6--QF6A Datasheet Bits Perm Init Description Identier : RO - Reserved DRW if in high priority mode SR_QUEUE DRW if, on kernel entry, the thread will switch to dual issue. SR_KEDI 8 RO when in dual issue mode. SR_DI DRW when the thread is in fast mode and will continually issue. SR_FAST 6 DRW when the thread is paused waiting for events, a lock or another resource. SR_WAITING RO - Reserved DRW when in kernel mode. SR_INK DRW when in an interrupt handler. SR_ININT DRW when in an event enabling sequence. SR_INENB DRW when interrupts are enabled for the thread. SR_IEBLE DRW when events are enabled for the thread. SR_EEBLE x: Debug SSR B. Debug SPC DBG_SPC 0x11 This register contains the value of the SPC register when the debugger was called. Bits Perm Init Description Identier : DRW Value. ALL_BITS x: Debug SPC B. Debug SSP DBG_SSP 0x12 This register contains the value of the SSP register when the debugger was called. Bits Perm Init Description Identier : DRW Value. ALL_BITS x: Debug SSP B. DGETREG operand DBG_T_NUM 0x13 The resource ID of the logical core whose state is to be read. Bits Perm Init Description Identier :8 RO - Reserved : DRW Thread number to be read DBG_T_NUM_NUM x: DGETREG operand |
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