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XM014034B Datasheet(PDF) 28 Page - Xmos Ltd. |
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XM014034B Datasheet(HTML) 28 Page - Xmos Ltd. |
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28 / 83 page ![]() XU6--QF6A Datasheet 0.0 valid VDD VDDIOB18 VDDIO* valid valid 0.9 0.0 1.8 0.0 V(VDDIO*) VDDIOB18 and VDD valid VDDIO* must be valid before VDDIO* valid 0.0 V(VDDIO*) RST_N high VDDIO* valid before 0.0 External RST_N 1.8 Time (a) Power sequencing, rely on internal POR Time (b) Power sequencing, use external RST_N Internal PORST_N 0 1 Th(VDDIOB18) Th(VDD) T(POR) VDDIOB18 and VDD must be valid within T(POR) of crossing threshold Figure : Sequencing of power supplies and RST_N (if used) nature implies that they must be coupled and properly isolated. The board design must ensure that the board traces for D+ and D- are tightly matched. In addition the differential impedance of D+ and D- must meet its specications. Figures 8 and show guidelines on how to space and stack the board when routing differential pairs. D+ D- D+ D- Low speed signal High speed signal Signal Signal GND Power Differential pair Differential pair W S 1 S 2 S 2 S 3 H Figure 8: Spacings of a low speed signal, two differential pairs and a high speed signal Parameter USB Value Unit Impedance Ω W : trace width . mm S1 : spacing between D+/D- . mm S2 : spacing between diff pairs . mm S3 : spacing to high speed signal . mm H : di-electric height . mm Skew between D+/D- mm Skew between clock/data N/A Figure : Differential pair parameters |
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