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TUSB7340 Datasheet(PDF) 25 Page - Texas Instruments |
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TUSB7340 Datasheet(HTML) 25 Page - Texas Instruments |
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25 / 122 page  7.2.2 Detailed Design Procedure 7.2.2.1 Upstream Implementation The upstream port of the TUSB7320 is connected to a PCIe x1 Gen 2 interface. As we are using a 48-Mhz external crystal, an external 2-MΩ feedback resistor is required between XI and XO. POPULATE PULLDOWN IF I2C EEPROM NOT USED AND DO NOT POPULATE PULLUP. PLACE CLOSE TO U1 JUMPER J22 FOR NO WAKE SUPPORT POPULATE R2 FOR WAKE SUPPORT. SDA R1EXT R1EXTRTN VSS_OSC XO XI FREQSEL SCL GPIO0 GPIO1 GPIO2 GPIO3 VDDA3P3V BOARD_1P1V BOARD_3P3V BOARD_3P3V BOARD_3P3V BOARD_3P3V USB_DP_DN2 pg3 USB_DM_DN2 pg3 USB_SSTXP_DN2 pg3 USB_SSTXN_DN2 pg3 USB_SSRXP_DN2 pg3 USB_SSRXN_DN2 pg3 OVERCUR2Z pg3 PWRON2Z pg3 USB_DM_DN1 pg3 USB_DP_DN1 pg3 USB_SSRXN_DN1 pg3 USB_SSRXP_DN1 pg3 USB_SSTXN_DN1 pg3 USB_SSTXP_DN1 pg3 PWRON1Z pg3 OVERCUR1Z pg3 PCIE_REFCLKN pg3 PCIE_REFCLKP pg3 PCIE_RXN pg3 PCIE_RXP pg3 PCIE_TXN pg3 PCIE_TXP pg3 PERSTZ pg3 WAKEZ pg3 GRSTZ pg4 Sheet of SIZE SCALE: NONE DWG NO: TUSB7320 Friday, May 09, 2014 C 2 4 Sheet of SIZE SCALE: NONE DWG NO: TUSB7320 Friday, May 09, 2014 C 2 4 Sheet of SIZE SCALE: NONE DWG NO: TUSB7320 Friday, May 09, 2014 C 2 4 J22 HDR2X1 M .1 1 2 R3 NOPOP 0402 5% C2 18pF Y1 ECS-48MHZ U2 24LC01_NF A0 1 A1 2 A2 3 GND 4 SDA 5 SCL 6 WP 7 VCC 8 R11 4.7K 0402 5% R1 NOPOP 0402 5% R39 0 R2 10K 0402 5% R38 0 C3 18pF R12 1M R10 9.09K 1% R4 NOPOP 0402 5% C1 0.1uF TUSB7320 TUSB7320_REVA U1 CLKREQ# B36 FREQSEL B14 GPIO0 A49 GPIO1 B46 GPIO2 B47 GPIO3 B48 GRST# A15 JTAG_RST# B32 JTAG_TCK A32 JTAG_TDI A35 JTAG_TDO B31 JTAG_TMS B30 PCIE_REFCLKN B41 PCIE_REFCLKP A45 PCIE_RXN A42 PCIE_RXP B39 PCIE_TXN A41 PCIE_TXP B38 PERST# A40 SCL B2 SDA A2 SMI B3 WAKE# B35 OVERCUR1# A36 OVERCUR2# A37 NC18 B43 NC26 B45 PWRON1# B33 PWRON2# B34 NC17 A46 NC25 A48 R1EXT A24 R1EXTRTN B23 USB_DM_DN1 B18 USB_DM_DN2 A13 NC11 A27 NC19 A5 USB_DP_DN1 A20 USB_DP_DN2 B12 NC12 B25 NC20 B5 USB_SSRXN_DN1 B16 USB_SSRXP_DN2 B9 NC13 A29 NC21 A7 USB_SSRXP_DN1 A18 USB_SSRXN_DN2 A10 NC14 B27 NC22 B6 USB_SSTXN_DN1 B15 USB_SSTXN_DN2 B10 NC15 A30 NC23 A8 USB_SSTXP_DN1 A17 USB_SSTXP_DN2 A11 NC16 B28 NC24 B7 VSS_OSC B21 XI A23 XO A22 BOARD_1P1V C32 0.1uF C17 0.1uF C36 0.01uF C12 0.01uF C31 0.1uF C18 0.01uF C34 0.1uF C20 0.1uF C21 0.01uF C23 0.1uF C16 0.1uF C37 0.1uF C13 0.1uF C30 0.01uF C33 0.01uF C24 22uF C19 0.1uF C35 0.1uF C14 0.1uF C22 0.1uF C15 0.01uF GPIO0 GPIO1 GPIO2 GPIO3 BOARD_3P3V R7 NOPOP 0402 5% R6 NOPOP 0402 5% R8 NOPOP 0402 5% R5 NOPOP 0402 5% VDDA3P3V BOARD_3P3V C6 0.1uF C28 0.1uF FB1 220 @ 100MHZ C25 0.1uF C9 0.1uF C7 0.01uF C11 0.1uF C29 0.1uF C5 0.01uF C26 0.1uF C10 0.01uF C4 22uF C8 0.1uF C27 0.1uF Figure 7-3. Reference Design 1 www.ti.com TUSB7320, TUSB7340 SLLSE76Q – MARCH 2011 – REVISED MARCH 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: TUSB7320 TUSB7340 |
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