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TUSB7340 Datasheet(PDF) 82 Page - Texas Instruments |
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TUSB7340 Datasheet(HTML) 82 Page - Texas Instruments |
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82 / 122 page ![]() 8.2.9 Advanced Error Capabilities and Control Register The Advanced Error Capabilities and Control Register allows the system to monitor and control the advanced error reporting capabilities. PCI Express Extended Register Offset: 118h Register type: Read-Only, Read/Write Default value: 0000 0050h Table 8-120. PCI Express Extended Register 118h Bit No. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reset State 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Bit No. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset State 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 Table 8-121. Bit Descriptions – Advanced Error Capabilities and Control Register BIT FIELD NAME ACCESS DESCRIPTION 31:9 RSVD r Reserved. Returns zeros when read. 8 ECRC_CHK_EN(1) rw Extended CRC Check Enable. 0 – Extended CRC checking is Disabled 1 – Extended CRC checking is Enabled 7 ECRC_CHK_CAPABLE r Extended CRC Check Capable. This read-only bit returns a value of 1 indicating that the TUSB73X0 is capable of checking extended CRC information. 6 ECRC_GEN_EN(1) rw Extended CRC Generation Enable. 0 – Extended CRC generation is Disabled 1 – Extended CRC generation is Enabled 5 ECRC_GEN_CAPABLE r Extended CRC Generation Capable. This read-only bit returns a value of 1 indicating that the TUSB73X0 is capable of generating extended CRC information. 4:0 FIRST_ERR(1) ru First Error Pointer. This five bit value reflects the bit position within the Uncorrectable Error Status Register corresponding to the class of the first error condition that was detected. (1) This bit is reset by a PCI Express reset (PERST), a GRST, or the internally generated power-on-reset. TUSB7320, TUSB7340 SLLSE76Q – MARCH 2011 – REVISED MARCH 2024 www.ti.com 82 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TUSB7320 TUSB7340 |
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