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TDA9983BHW/8/C1 Datasheet(PDF) 55 Page - NXP Semiconductors |
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TDA9983BHW/8/C1 Datasheet(HTML) 55 Page - NXP Semiconductors |
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55 / 119 page ![]() TDA9983B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 20 May 2008 55 of 119 NXP Semiconductors TDA9983B 150 MHz pixel rate HDMI transmitter 9.4.3 Current page address register 9.5 PLL settings page register definitions The current page address for the PLL settings page is 02h. The configuration of the registers for this page is given in Table 66. 1 TOP_SEL W top select 0* top_tbg_sci = top_tbg_sci (internal; programmed via I2C-bus) 1 top_tbg_sci = top_tbg_vrf 0 TOP_TGL W top toggle 0* no specific action 1 toggle top_tbg_sci Table 64. TBG_CNTRL_0 register (address CAh) bit description …continued Legend: * = default value Bit Symbol Access Value Description Table 65. CURPAGE_ADR register (address FFh) bit description Legend: * = default value Bit Symbol Access Value Description 7 to 0 CURPAGE_ADR[7:0] W 00h* current page address: selects the current memory page |
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