C5NPD0-DS datasheet(29/100 Pages) FREESCALE

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Pin Descriptions Grouped by Function

V 04

• Fabric Processor Interface Signals

• BMU SDRAM Interface Signals

• TLU SRAM Interface Signals

• QMU SRAM Interface Signals

• Power Supply Signals

• Test Signals

• No Connection Pins

LVTTL and LVPECL

Specifications

C-5 NP pins are the following types:

• Low Voltage TTL-Compatible (LVTTL). The C-5 NP’s LVTTL pins conform to the JEDEC

JESD8-B specification.

• Low Voltage Positive Emitter Coupled Logic (LVPECL). The C-5 NP’s LVPECL pins

conform to the JEDEC JESD8-2 specification.

Clock Signals

Table 5 describes the C-5 NP clock signals.

Table 5 Clock and Reference Signals

SIGNAL NAME

PIN #

TOTAL

TYPE

I/O

SIGNAL DESCRIPTION

SCLK*

SCLKX*

H15

G15

LVPECL

Core Clock Rate (Differential)

CCLK0

K12

LVTTL

1_544MHZ_CLK (T1)†

CCLK1

J13

LVTTL

2_048MHZ_CLK (E1)†

CCLK2

J15

LVTTL

34_368MHZ_CLK (E3)†

CCLK3

I12

LVTTL

44_736MHZ_CLK (T3)†

CCLK4

I14

LVTTL

50MHZ_CLK (100Mbit Ethernet)†

CCLK5

H13

LVTTL

106_25MHZ_CLK (Fibre Channel)†

CCLK6

K14

LVTTL

125MHZ_CLK (Gigabit Ethernet)†

CCLK7

K16

LVTTL

155_52MHZ_CLK (OC-3)†

Freescale Semiconductor, Inc.

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C5NPD0-DS Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc

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