C5NPD0-DS datasheet(82/100 Pages) FREESCALE

Part #	C5NPD0-DS

Description	C-5 Network Processor Silicon Revision D0

PDF	100 Pages

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

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CHAPTER 3: ELECTRICAL SPECIFICATIONS

C5NP

MDIO Serial Interface Timing Specifications

The MDIO serial interface timing is shown in Figure 19 and described in Table 47.

Figure 19 MDIO Serial Interface Timing Diagram

Tpah

PAD/P_ctl Hold

0.0

Tpao

PAD/P_ctl Output

2.0

6.0

Tpaz

PAD/P_ctl Clk to Tri‡

1.8

5.5

Tpav

PAD/P_ctl Clk to Driven‡

1.3

5.5

Tpgs

PGNTX Setup

5.1

Tpgh

PGNTX Hold

0.0

Tpis

PIDSEL Setup

5.0

Tpih

PIDSEL Hold

0.0

PRSTX**

PINTA**

* 66MHz PCI

† P_ctl includes all PCI control parameters including: PPAR, PFRAMEX, PTRDYX, PIRDYX,

PSTOPX, PDEVSELX, PPERRX, PSERRX

‡ Not fully tested, values based on design/characterization.

** Asynchronous

Table 46 PCI Timing Description (continued) (continued)

SYMBOL

PARAMETER

MIN

TYP

MAX

UNIT

Cycle 2

Cycle 3

Cycle 4

Tsic

Tsids

SICL

SIDA

(output)

SIDA

(input)

Tsods Tsodh

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