C5NPD0-DS datasheet(89/100 Pages) FREESCALE

Part #	C5NPD0-DS

Description	C-5 Network Processor Silicon Revision D0

PDF	100 Pages

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

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AC Timing Specifications

V 04

QMU Timing

Specifications

The QMU timing specifications are shown in Figure 25 and described in Table 55.

Figure 25 QMU Timing Diagram

Data (TDn)

TD0 - TD63

Table 54 Signal Groups in TLU Timing Diagrams

SIGNAL GROUP

INCLUDED SIGNALS

QCLK

Cycle 1

Cycle 2

Cycle 3

Cycle 4

Cycle 5

QCMDn

(output)

QDATAn

(output)

QDATAn

(input)

Tqc

Tqdo

Tqdv

Tqdz

Tqds

Tqdh

Tqco

Table 55 QMU Timing Description

SYMBOL

PARAMETER

MIN

TYP

MAX

UNIT

COMMENT

Tqc

QMU Cycle Time

2 x Tsc

4 x Tsc

1X Clock Mode

2X Clock Mode

Tqco

QMU Ctrl Output

1.5

1/2 Tsc + 1.0

Tsc + 1.0

1X Clock Mode

2X Clock Mode

Tqds

QMU Data Setup

3.1

Tqdh

QMU Data Hold

1.3

3.5

Tqdo

QMU Data Output

1.5

1/2 Tsc + 1.0

Tsc + 1.0

1X Clock Mode

2X Clock Mode

Tqdz

QMU Data Clk to Tri*

1.1

5.5

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