C5NPD0-DS datasheet(45/100 Pages) FREESCALE

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Pin Descriptions Grouped by Function

V 04

The following tables list the Fabric Interface pin mappings:

• Utopia1, Utopia2, Utopia3 ATM Mode mappings are listed in Table 19

• Utopia1, Utopia2, Utopia3 PHY Mode mappings are listed in Table 20

• PRIZMA Mode mappings are listed in Table 21 (PRIZMA mode is an example of Utopia3

PHY mode)

• Power X Mode mappings are listed in Table 22

FTXCTL0 - FTXCTL6

U18, W18, V18, X18, X17, V17, X16

LVTTL

I, O

Transmit Control Signals

TOTAL PINS

Table 18 Fabric Interface Signals (continued)

SIGNAL NAME

PIN #

TOTAL

TYPE

I/O

SIGNAL DESCRIPTION

Table 19 Utopia1*, 2*, 3 ATM Mode, C-5 Network Processor to Fabric Interface Pin Mapping

RECEIVE SIGNALS

TRANSMIT SIGNALS

C-5 NETWORK

PROCESSOR

I/O

UTOPIA

NOTE

C-5 NETWORK

PROCESSOR

I/O

UTOPIA

NOTE

FRXCTL0

Output

RxEnb*

Pullup or nc

FTXCTL0

Output

TxEnb*

Pullup or nc

FRXCTL1

Input

RxClav

Pulldown

FTXCTL1

Input

TxClav

Pulldown

FRXCTL2

Input

RxSOC

Pulldown

FTXCTL2

Output

TxSOC

Pulldown

FRXCTL3

Input

n/a

Pullup or

Pulldown

FTXCTL3

FRXCTL4

Input

n/a

FTXCTL4

FRXCTL5

Input

n/a

FTXCTL5

FRXCTL6

Input

RxPrty

FTXCTL6

Output

TxPrty

* cell size must be 4Byte aligned.

Table 20 Utopia1*, 2*, 3 PHY Mode, C-5 Network Processor to Fabric Interface Pin Mapping

RECEIVE SIGNALS

TRANSMIT SIGNALS

C-5 NETWORK

PROCESSOR

I/O

UTOPIA

NOTE

C-5 NETWORK

PROCESSOR

I/O

UTOPIA

NOTE

FRXCTL0

Input

TxEnb*

Pullup

FTXCTL0

Input

RxEnb*

Pullup

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