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C5NPD0-DS Datasheet(PDF) 76 Page - Freescale Semiconductor, Inc |
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C5NPD0-DS Datasheet(HTML) 76 Page - Freescale Semiconductor, Inc |
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76 / 100 page ![]() 76 CHAPTER 3: ELECTRICAL SPECIFICATIONS C5NP Figure 14 10/100 Ethernet Timing Diagram Gigabit GMII Ethernet, TBI and MII Interface Timing Specifications The Gigabit GMII Ethernet interface timing is shown in Figure 15 and described in Table 42. The TBI interface timing is shown in Figure 15 and described in Table 43. CPn_0 (TCLK) Cycle 1 Cycle 2 Cycle 3 Cycle 4 Cycle 5 CPn_2/3/6 (Tx) CPn_1/4/5 (Rx) Tcet Tceo Tces Tceh Table 41 10/100 Ethernet Timing Description SYMBOL PARAMETER MIN TYP MAX UNIT Tcet Transmit Cycle Time* * STD/Fast Ethernet 20 ns Tceo Output Time 3.0 15.0 ns Tces Setup Time 2.0 ns Tceh Hold Time 2.5 ns Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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