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CP3SP33SMS/NOPB Datasheet(PDF) 188 Page - Texas Instruments |
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CP3SP33SMS/NOPB Datasheet(HTML) 188 Page - Texas Instruments |
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188 / 407 page ![]() Exit Interrupt Entry Point Clear RX_PND Write RX_READY Read buffer (id/data/control) DS039 CP3SP33 SNOSCW5 – MAY 2013 www.ti.com 5. Read the buffer status again and check it is not RX_BUSYx. If it is, repeat this step until RX_BUSYx has gone away. 6. If the buffer status is RX_FULL or RX_OVERRUN, one or more messages were copied. In that case, start over with step 2. 7. If status is still RX_READY (as set by the CPU at step 2), clear interrupt pending bit and exit. When the BUFFLOCK function is enabled (see BUFFLOCK in section Section 22.4), it is not necessary to check for new messages received during the read process from the buffer, as this buffer is locked after the reception of the first valid frame. A read from a locked receive buffer can be performed as shown in Figure 22-22. Figure 22-22. Buffer Read Routine (BUFFLOCK Enabled) For simplicity only the applicable interrupt routine is shown: 1. Read the ID/data and object control (DLC/RTR) from the message buffer. 2. Write RX_READY into CNSTAT. 3. Clear interrupt pending bit and exit. 22.5.3 Rx Buffer States As shown in Figure 22-22, a receive procedure starts as soon as software has set the buffer from the RX_NOT_ACTIVE state into the RX_READY state. The status section of CNSTAT register is set from 0000b to 0010b. When a message is received, the buffer will be RX_BUSYx during the copy process from the hidden receive buffer into the message buffer. Afterwards this buffer is RX_FULL. The CPU can then read the buffer data and either reset the buffer status to RX_READY or receive a new frame before the CPU reads the buffer. In the second case, the buffer state will automatically change to RX_OVERRUN to indicate that at least one message was lost. During the copy process the buffer will again be RX_BUSYx for a short time, but in this case the CNSTAT status section will be 0101b, as the buffer was RX_FULL (0100b) before. After finally reading the last received message, the CPU can reset the buffer to RX_READY. 188 Dual CAN Interfaces Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links :CP3SP33 |
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