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CP3SP33SMS/NOPB Datasheet(PDF) 190 Page - Texas Instruments

Part # CP3SP33SMS/NOPB
Description  Connectivity Processor with Cache, DSP, and Bluetooth짰, USB, and Dual CAN Interfaces
PDF  407 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CP3SP33SMS/NOPB Datasheet(HTML) 190 Page - Texas Instruments

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CP3SP33
SNOSCW5 – MAY 2013
www.ti.com
If the transmit process fails or the arbitration is lost, the transmission process will be stopped and will
continue after the interrupting reception or the error signaling has finished (see Figure 22-23). In that case,
a new buffer select follows and the TX process is executed again.
NOTE
The canceled message can be delayed by a TX request of a buffer with a higher priority.
While TX_BUSY is high, software cannot change the contents of the message buffer object.
In all cases, writing to the BUSY bit will be ignored.
22.6.2 Transmit Priority
The CAN module is able to generate a stream of scheduled messages without releasing the bus between
two messages so that an optimized performance can be achieved. It will arbitrate for the bus immediately
after sending the previous message and will only release the bus due to a lost arbitration.
If more than one buffer is scheduled for transmission, the priority is built by the message buffer number
and the priority code in the CNSTAT register. The 8-bit value of the priority is combined by the 4-bit TXPRI
value and the 4-bit buffer number (0...14) as shown below. The lowest resulting number results in the
highest transmit priority.
7
4M M3
0
TXPRI
BUFFER #
Table 22-3 shows the transmit priority configuration if the priority is TXPRI = 0 for all transmit buffers.
Table 22-3. Transmit Priority (TXPRI = 0)
TXPRI
BUFFER NUMBER
PRI
TX PRIORITY
0
0
0
Highest
0
1
1
:
:
:
:
:
:
:
:
0
14
14
Lowest
Table 22-4 shows the transmit priority configuration if TXPRI is different from the buffer number.
Table 22-4. Transmit Priority (TXPRI not 0)
TXPRI
BUFFER NUMBER
PRI(1)
TX PRIORITY
14
0
224
Lowest
13
1
209
12
2
194
11
3
179
10
4
164
9
5
149
8
6
134
7
7
119
6
8
104
5
9
89
4
10
74
3
11
59
(1)
If two buffers have the same priority (PRI), the buffer with the lower
buffer number will have the higher priority.
190
Dual CAN Interfaces
Copyright © 2013, Texas Instruments Incorporated
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