TUSB7340 datasheet(46/117 Pages) TI1

46 / 117 page

TUSB7320, TUSB7340

SLLSE76M – MARCH 2011 – REVISED JULY 2015

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7.5.1.50 Serial Bus Index Register

The value written to the Serial Bus Index register represents the byte address of the byte being read or written

from the serial bus device. The Serial Bus Index register must be written before the before initiating a serial bus

cycle by writing to the Serial Bus Slave Address register. This register is reset by a PCI Express reset (PERST#),

a GRST#, or the internally-generated power-on reset.

PCI register offset: B1h

Default value: 00h

Table 78. PCI Register B1h

Bit No.

Reset State

7.5.1.51 Serial Bus Slave Address Regsiter

The Serial Bus Slave Address register is used to indicate the address of the device being targeted by the serial

bus cycle. This register also indicates if the cycle will be a read or a write cycle. Writing to this register initiates

the cycle on the serial interface. This register is reset by a PCI Express reset (PERST#), a GRST#, or the

internally-generated power-on reset.

PCI register offset: B2h

Default value: 00h

Table 79. PCI Register B2h

Bit No.

Reset State

Table 80. Serial Bus Slave Address Register Description

BIT

FIELD NAME

ACCESS

DESCRIPTION

Serial Bus Slave Address. This bit field represents the slave address of a

7:1

SLAVE_ADDR(1)

read or write transaction on the serial interface.

Read/Write Command. This bit is used to determine if the serial bus

cycle will be a read or a write cycle.

RW_CMD(1)

0 – A single byte write is requested.

1 – A single byte read is requested.

(1)

This bit is reset by a PCI Express reset (PERST), a GRST, or the internally generated power-on reset.

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TUSB7340 Datasheet(PDF) 46 Page - Texas Instruments