STM32U375CE datasheet(44/222 Pages) STMICROELECTRONICS

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•

Frame-level management, when controller:

–

Software-triggered or hardware-triggered transfer

–

Optional C-FIFO and TX-FIFO preload

–

Multiple messages encapsulation

–

Optional arbitrable header generation on the I3C bus

–

HDR exit pattern generation on the I3C bus for error recovery

•

Programmable bus timing, when controller:

–

SCL high and low period

–

SDA hold time

–

Bus free (minimum) time

–

Bus available/idle condition time

–

Clock stall time

•

Target-initiated requests management:

–

Simultaneous support up to four targets, when controller

–

In-band interrupts, with programmable IBI payload (up to 4 bytes), with pending read notification

support

–

Bus control request, with recovery flow support and hand-off delay

–

Hot-join mechanism

•

HDR exit pattern detection, when target

•

Bus error management:

–

CEx with x = 0, 1, 2, 3 when controller

–

TEx with x = 0, 1, ..., 6 when target

–

Bus control switch error and recovery

–

Target reset

•

Individual programmable event-based management:

–

Per-event identification with flag reporting and clear control

–

Host application notification via flag polling, and/or via interrupt with a per-event programmable

enable

–

Error type identification

•

Wake-up from Stop mode(s), as controller:

–

On an in-band interrupt without payload

–

On a hot-join request

–

On a controller-role request

•

Wake-up from Stop mode(s), as target:

–

On a reset pattern

–

On a missed start

•

Wake-up from Standby and Shutdown modes on a target reset pattern

•

Autonomous mode and transfers during Stop mode(s) with DMA

•

Multiclock domain management:

–

Separate APB clock and kernel clock, driven from independently programmed clock sources via the

RCC, in addition to SCL clock

–

Minimum operating frequency for the kernel clock and the APB clock vs. the application-driven SCL

clock

Table 14. I3C peripheral controller/target features versus MIPI® v1.1

Feature

MIPI® I3C

v1.1

I3C peripheral

Comments

When controller When target

I3C SDR message

STM32U375xx

Functional overview

DS14861 - Rev 2

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