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STM32U375CE Datasheet(PDF) 17 Page - STMicroelectronics

Part # STM32U375CE
Description  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 144 DMIPS, 1 MB flash memory, 256 KB SRAM, SMPS
PDF  222 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U375CE Datasheet(HTML) 17 Page - STMicroelectronics

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VDDSMPS is the external power supply for the SMPS step-down converter. It is provided externally through a
VDDSMPS supply pin. It must be connected to the same supply VDD pin when the SMPS is used in the
application. When the SMPS is not used, it is recommended to connect both VDDSMPS and VLXSMPS to GND.
•
VLXSMPS is the switched SMPS step-down converter output.
Note:
The SMPS power supply pins are available only on a specific package with SMPS step-down converter option.
•
VDDUSB = 3.0 V to 3.6 V
VDDUSB is the external independent power supply for USB transceivers. VDDUSB voltage level is independent from
the VDD voltage and must be connected to VDD or VSS pin (preferably to VDD) when the USB is not used.
•
VDDIO2 = 1.08 V to 3.6 V
VDDIO2 is the external power supply for 14 I/Os (port G[15:2]). The VDDIO2 voltage level is independent from the
VDD voltage and must be connected to VDD or VSS pin (preferably to VDD) when PG[15:2] are not used.
•
VBAT = 1.65 V to 3.6 V (functionality guaranteed down to VBOR_VBAT min value)
VBAT is the power supply when VDD is not present (through power switch) for RTC, TAMP, external 32 kHz
oscillator, and backup registers.
•
VREF-, VREF+
VREF+ is the input reference voltage for ADCs and DACs. It is also the output of the internal voltage reference
buffer when enabled.
VREF+ can be grounded when ADC and DAC are not active.
The internal voltage reference buffer supports four output voltages:
•
VREF+ around 1.5 V. This requires VDDA ≥ 1.8 V.
•
VREF+ around 1.8 V. This requires VDDA ≥ 2.1 V.
•
VREF+ around 2.048 V. This requires VDDA ≥ 2.4 V.
•
VREF+ around 2.5 V. This requires VDDA ≥ 2.8 V.
VREF- and VREF+ pins are not available on all packages. When not available, they are bonded to VSSA and
VDDA, respectively.
When the VREF+ is double-bonded with VDDA in a package, the internal voltage reference buffer is not available
and must be kept disabled.
VREF- must always be equal to VSSA.
The STM32U375xx devices embed two regulators: one LDO and one SMPS in parallel to provide the VCORE
supply for digital peripherals, SRAM1, SRAM2, and embedded flash memory. The SMPS generates this voltage
on VDD11 (two pins), with a total external capacitor of 4.7 μF typical. SMPS requires an external coil of 2.2 μH
typical. The LDO generates this voltage on a VCAP pin connected to an external capacitor of 4.7 μF typical.
Both regulators can provide two different voltages (voltage scaling) and can operate in Stop mode.
It is possible to switch from SMPS to LDO and from LDO to SMPS on-the-fly.
STM32U375xx
Functional overview
DS14861 - Rev 2
page 17/222



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