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STM32U375CE Datasheet(PDF) 8 Page - STMicroelectronics |
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STM32U375CE Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 222 page  Figure 1. STM32U375xx block diagram NJTRST, JTDI, JTCK/SWCLK, JTMS/SWDIO, JTDO TRACECLK, TRACED[3:0] JTAG & SW MPU ETM NVIC Arm Cortex-M33 96 MHz TrustZone FPU C-BUS S-BUS D[7:0], D[3:1]dir CMD, CMDdir,CK, CKin D0dir, D2dir SDMMC1 GPDMA1 TSC GPIO port A GPIO port B GPIO port C GPIO port D GPIO port E GPIO port G GPIO port H EXT IT. WKP 7 groups of 4 I/Os max as AF PA[15:0] PB[15:0] PD[15:0] PE[15:0] PG[15:2] PH[0:1,3] 136 AF 13xIN @VDDA ADC2 2 channels, 1 compl. channel, BKIN as AF TIM15 16b 1 channel, 1 compl. channel, BKIN as AF TIM16 16b 1 channel, 1 compl. channel, BKIN as AF TIM17 16b RX, TX, CK,CTS, RTS as AF MOSI, MISO, SCK, NSS as AF SPI1 smcard irDA USART1 SYSCFG AHB/APB2 AHB/APB3 AHB2 96 MHz SRAM2 64 KB SRAM1 192 KB Flash memory Up to 1 MB OCTOSPI1 memory interface IO[7:0], CLK, NCLK, NCS. DQS RNG HASH @VDD Power management Voltage regulator LDO and SMPS VDD = 1.71 to 3.6 V VSS VDD @VDD Supply supervision BOR VDDIO, VDDUSB, VDDA, VSSA, VDD, VSS, NRST Reset PVD, PVM Int @VDD XTAL OSC 4- 50 MHz IWDG OSC_IN OSC_OUT Standby interface @VDD RC MSI Reset and clock control TIM2 32b TIM3 32b TIM4 32b UART4 UART5 SPI2 I2C1/SMBUS I2C2/SMBUS smcard irDA USART3 4 channels, ETR as AF 4 channels, ETR as AF 4 channels, ETR as AF RX, TX, CK, CTS, RTS as AF RX, TX, CTS, RTS as AF RX, TX, CTS, RTS as AF MOSI, MISO, SCK, NSS as AF SCL, SDA, SMBA as AF SCL, SDA, SMBA as AF WWDG CRS TIM6 16b TIM7 16b @VDDA COMP1 INP[1:4], INM[[1:2], OUT COMP2 INP[1:2], INM[[1:2], OUT VINP, VINN, VOUT LPTIM1 IN1, CH1, CH2, ETR as AF LPTIM3 IN1, IN2, CH1, CH2, ETR as AF LPTIM4 IN1, OUT, ETR as AF I2C3/SMBUS SCL, SDA, SMBA as AF LPUART1 RX, TX, CTS, RTS_DE as AF AHB/APB1 @VDDA D/A Converter 1 DAC1 ITF DAC1_OUT1 DAC1_OUT2 @Vsw XTAL 32k RTC RTC_OUT1, RTC_OUT2, RTC_REFIN, RTC_TS TAMP TAMP_IN[5:1] 4 compl. channels (TIM1_CH[1:4]N), 4 channels (TIM1_CH[1:4]), ETR, BKIN, BKIN2 as AF TIM1/PWM 16b 15xIN @VDDA ADC1 ITF RC HSI RC HSI48 RC LSI I3C1 SCL, SDA as AF SCL, SDA as AF I3C2 VREF buffer @VDDA VREF+ LPTIM2 IN1, IN2, CH1, CH2, ETR as AF FDCAN1 TX, RX as AF @VDDA OpAmp1 VINP, VINN, VOUT OpAmp2 VDD power domain VDDUSB power domain Vsw power domain VDDIO2 power domain VDDA power domain GTZC1 CRC SPI3 MOSI, MISO, SCK, NSS as AF ADF1 SDIN0, CKIN0, CCK0, CCK1 as AF D[1:3], MCLK_A, SD_A, FS_A, SCK_A, MCLK_B, SD_B, FS_B, SCK_B as AF SAI1 @VDDUSB DP DM USB FS D/A Converter 2 Note: VSW = VDD when VDD is above VBOR0, and VSW = VBAT when VDD is below VBOR0. PC[15:13] PC[12:0] PKA STM32U375xx Description DS14861 - Rev 2 page 8/222 |
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