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STM32U375CE Datasheet(PDF) 76 Page - STMicroelectronics |
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STM32U375CE Datasheet(HTML) 76 Page - STMicroelectronics |
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76 / 222 page ![]() Pin Number Alternate functions Additional functions 43 E5 59 D3 C7 A7 93 A4 30 43 59 C3 93 B4 PB7 I/O FT_fha (7) LPTIM1_IN2, TIM4_CH2, I2C1_SDA(boot), USART1_RX, UART4_CTS, TSC_G2_IO4, OCTOSPI1_IO6, TIM17_CH1N, EVENTOUT COMP2_INM1, PVD_IN, WKUP4 44 C5 60 A3 A7 B8 94 A3 - 44 60 B4 94 A4 PH3-BOOT0 (PH3) I/O FT_fh - TIM4_CH4, I3C1_SDA, I3C2_SDA, EVENTOUT - 45 B6 61 C3 B8 - 95 B4 - 45 61 B3 95 A3 PB8 I/O FT_fh - TIM4_CH3, SAI1_CK1, I2C1_SCL, I3C2_SCL, SPI3_RDY, SDMMC1_CKIN, FDCAN1_RX(boot), SDMMC1_D4, SAI1_MCLK_A, TIM16_CH1, EVENTOUT WKUP5 - A7 - - C9 - 96 A1 - 46 62 A3 96 B3 PB9 I/O FT_fh - IR_OUT, TIM4_CH4, SAI1_D2, I2C1_SDA, SPI2_NSS, I3C2_SDA, SDMMC1_CDIR, FDCAN1_TX(boot), SDMMC1_D5, SAI1_FS_A, TIM17_CH1, EVENTOUT - - - - - - - 97 A2 - - - - 97 C3 PE0 I/O FT - TIM4_ETR, TIM16_CH1, EVENTOUT - - - - - - - - - - - - - 98 A2 PE1 I/O FT - TIM17_CH1, EVENTOUT - - - - - - - - - 31 - - - - - VCAP S - - - - 46 - 62 A2 - - 98 C5 - - - - - - VDD11 S - - - - 47 C7 63 B7 D8 D8 99 D10 32 47 63 D6 99 F2 VSS S - - - - 48 B8 64 A8 A9 A9 100 K4 1 48 64 E4 100 H3 VDD S - - - - 1. PC13, PC14 and PC15 are supplied through the power switch (by VSW). Since the switch only sinks a limited amount of current (3 mA), the use of PC13 to PC15 GPIOs in output mode is limited. PC13 speed must not exceed 2 MHz with a maximum load of 30 pF. Refer to FT_o electrical characteristics for PC14, PC15. These GPIOs must not be used as current sources (for example to drive a LED). 2. After a backup domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function depends on the content of the RTC registers that are not reset by the system reset. For details on how to manage these GPIOs, refer to the backup domain and RTC register descriptions in the product reference manual. 3. After reset, this pin is configured as JTAG/SWD alternate functions. The internal pull-up on PA15, PA13, PB4 pins and the internal pull-down on PA14 pin are activated. 4. Boot for all packages except for WLCSP68 SMPS-G package. 5. Boot only for WLCSP68 SMPS-G package. 6. Power supply is VDDIO2. 7. On the UQFN32 package the pin PB7 is internally connected to BOOT0, and therefore it is denoted as PB7-BOOT0. |
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