STM32U375CE datasheet(46/222 Pages) STMICROELECTRONICS

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Auto baud rate detection

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Programmable data word length (7, 8 or 9 bits)

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Programmable data order with MSB-first or LSB-first shifting

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Configurable stop bits (1 or 2 stop bits)

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Synchronous SPI master/slave mode and clock output/input for synchronous communications

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SPI slave transmission underrun error flag

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Single-wire half-duplex communications

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Continuous communications using DMA

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Received/transmitted bytes are buffered in reserved SRAM using centralized DMA

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Separate enable bits for transmitter and receiver

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Separate signal polarity control for transmission and reception

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Swappable Tx/Rx pin configuration

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Hardware flow control for modem and RS-485 transceiver

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Communication control/error detection flags

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Parity control:

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Transmits parity bit

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Checks parity of received data byte

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Interrupt sources with flags

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Multiprocessor communications: wake-up from Mute mode by idle line detection or address mark detection

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Autonomous functionality in Stop mode with wake-up from Stop mode capability

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LIN master synchronous break send capability and LIN slave break detection capability

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13-bit break generation and 10/11-bit break detection when USART is hardware configured for LIN

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IrDA SIR encoder decoder supporting 3/16-bit duration for Normal mode

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Smartcard mode

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Supports the T = 0 and T = 1 asynchronous protocols for smartcards as defined in the ISO/IEC

7816-3 standard

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0.5 and 1.5 stop bits for Smartcard operation

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Support for Modbus communication

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Timeout feature

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CR/LF character recognition

Refer to Table 15. USART and LPUART features for more details.

3.36

Low-power universal asynchronous receiver transmitter (LPUART)

The devices embed one low-power UART. The LPUART is an UART that enables bidirectional UART

communications with a limited power consumption. Only 32.768 kHz LSE clock is required to enable UART

communications up to 9600 baud. Higher baud rates can be reached when the LPUART is clocked by clock

sources different from the LSE clock.

Even when the microcontroller is in low-power mode, the LPUART can wait for an incoming UART frame while

having an extremely low energy consumption. The LPUART includes all necessary hardware support to make

asynchronous serial communications possible with minimum power consumption.

It supports Half-duplex Single-wire communications and modem operations (CTS/RTS). It also supports

multiprocessor communications DMA (direct memory access) can be used for data transmission/reception.

The LPUART main features are:

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Full-duplex asynchronous communications

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NRZ standard format (mark/space)

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Programmable baud rate

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From 300 baud/s to 9600 baud/s using a 32.768 kHz clock source

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Higher baud rates can be achieved by using a higher frequency clock source

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Two internal FIFOs to transmit and receive data

Each FIFO can be enabled/disabled by software and come with status flags for FIFOs states.

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Dual-clock domain with dedicated kernel clock for peripherals independent from PCLK

STM32U375xx

Functional overview

DS14861 - Rev 2

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